REV. B
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AD8012
*
Dual 350 MHz
Low Power Amplifier
*Protected under U.S. Patent Number 5,537,079.
FEATURES
Low Power
1.7 mA/Amplifier Supply Current
Fully Specified for 5 V and +5 V Supplies
High Output Current, 125 mA
High Speed
350 MHz, –3 dB Bandwidth (G = +1)
150 MHz, –3 dB Bandwidth (G = +2)
2,250 V/s Slew Rate
20 ns Settling Time to 0.1%
Low Distortion
–72 dBc Worst Harmonic @ 500 kHz, R
L
= 100
–66 dBc Worst Harmonic @ 5 MHz, R
L
= 1 k
Good Video Specifications (R
L
= 1 k, G = +2)
0.02% Differential Gain Error
0.06 Differential Phase Error
Gain Flatness 0.1 dB to 40 MHz
60 ns Overdrive Recovery
Low Offset Voltage, 1.5 mV
Low Voltage Noise, 2.5 nV/√Hz
Available in 8-Lead SOIC and 8-Lead MSOP
APPLICATIONS
XDSL, HDSL Line Drivers
ADC Buffers
Professional Cameras
CCD Imaging Systems
Ultrasound Equipment
Digital Cameras
FUNCTIONAL BLOCK DIAGRAM
8
7
6
5
1
2
3
4
OUT1
–IN1
+IN1
+V
S
OUT2
–IN2
+IN2–V
S
AD8012
PRODUCT DESCRIPTION
The AD8012 is a dual, low power, current feedback amplifier
capable of providing 350 MHz bandwidth while using only
1.7 mA per amplifier. It is intended for use in high frequency,
wide dynamic range systems where low distortion and high
speed are essential and low power is critical.
With only 1.7 mA of supply current, the AD8012 also offers
exceptional ac specifications such as 20 ns settling time and
2,250 V/µs slew rate. The video specifications are 0.02% differ-
ential gain and 0.06 degree differential phase, excellent for such
a low power amplifier. In addition, the AD8012 has a low offset
of 1.5 mV.
The AD8012 is well suited for any application that requires high
performance with minimal power.
The product is available in standard 8-lead SOIC or MSOP
packages and operates over the industrial temperature range
–40°C to +85°C.
R
L
–
–40
–90
10 1k100
DISTORTION – dBc
–70
–80
–60
–50
G = +2
V
OUT
= 2V p-p
R
F
= 750
THIRD
SECOND
Figure 1. Distortion vs. Load Resistance, V
S
=
±
5V,
Frequency = 500 kHz
AMP 1
V
IN
V
REF
R2
R1
R
L
= 100
OR
135
V
OUT
Np:Ns
TRANSFORMER
LINE
POWER
IN dB
+V
S
+
–
–V
S
+
–
Figure 2. Differential Drive Circuit for XDSL Applications
