CY62177ESL MoBL
®
Document Number: 001-64709 Rev. *E Page 10 of 16
Figure 8. Write Cycle No. 3 (WE
Controlled, OE LOW)
[29]
Figure 9. Write Cycle No. 4 (BHE/BLE Controlled, OE LOW)
[29]
Switching Waveforms (continued)
Valid Data
t
HD
t
SD
t
LZWE
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
WC
t
HZWE
t
BW
NOTE 30
Address
CE
1
CE
2
BHE/BLE
WE
Data I/O
t
HD
t
SD
t
SA
t
HA
t
AW
t
WC
Valid Data
t
BW
t
SCE
t
PWE
NOTE 30
Address
CE
1
CE
2
BHE/BLE
WE
Data I/O
Notes
29. If CE
1
goes HIGH and CE
2
goes LOW simultaneously with WE = V
IH
, the output remains in a high impedance state.
30. During this period the I/Os are in output state and input signals should not be applied.
CY62177ESL MoBL
®
Document Number: 001-64709 Rev. *E Page 11 of 16
Truth Table
CE
1
CE
2
WE OE BHE BLE Inputs Outputs Mode Power
HX
[31]
XXX
[31]
X
[31]
High Z Deselect/Power-down Standby (I
SB
)
X
[31]
LXXX
[31]
X
[31]
High Z Deselect/Power-down Standby (I
SB
)
X
[31]
X
[31]
X X H H High Z Deselect/Power-down Standby (I
SB
)
L H H L L L Data out (I/O
0
–I/O
15
) Read Active (I
CC
)
L H H L H L High Z (I/O
8
–I/O
15
);
Data out (I/O
0
–I/O
7
)
Read Active (I
CC
)
L H H L L H Data out (I/O
8
–I/O
15
);
High Z (I/O
0
–I/O
7
)
Read Active (I
CC
)
L H L X L L Data in (I/O
0
–I/O
15
) Write Active (I
CC
)
L H L X H L High Z (I/O
8
–I/O
15
);
Data in (I/O
0
–I/O
7
)
Write Active (I
CC
)
L H L X L H Data in (I/O
8
–I/O
15
);
High Z (I/O
0
–I/O
7
)
Write Active (I
CC
)
L H H H L H High Z Output disabled Active (I
CC
)
L H H H H L High Z Output disabled Active (I
CC
)
L H H H L L High Z Output disabled Active (I
CC
)
Note
31. The ‘X’ (Don’t care) state for the chip enables and byte enables in the truth table refer to the logic state (either HIGH or LOW). Intermediate voltage levels on these
pins is not permitted.
CY62177ESL MoBL
®
Document Number: 001-64709 Rev. *E Page 12 of 16
Ordering Information
Table 2 lists the CY62177ESL MoBL
®
key package features and ordering codes. The table contains only the parts that are currently
available. If you do not see what you are looking for, contact your local sales representative. For more information, visit the Cypress
website at www.cypress.com and refer to the product summary page at http://www.cypress.com/products.
Ordering Code Definitions
Table 2. Key Features and Ordering Information
Speed
(ns) Ordering Code
Package
Diagram
Package Type
Operating
Range
55 CY62177ESL-55ZXI 51-85183 48-pin TSOP-I (12 × 18.4 × 1 mm) Pb-free Industrial
CY
Family: MoBL SRAM
621 7
7
Density: 32 Mbit
Company ID: CY = Cypress
E
Bus Width: x16
Process Technology: 90 nm
SL
Wide voltage range (3 V and 5 V)
55
Speed grade
ZX
Package type:
TSOP I (Pb-free)
I
Temperature grades:
I = Industrial

CY62177ESL-55ZXI

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
SRAM 32Mb 55ns 2M x 16 Low Power SRAM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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