DOC#: SP-AP-0017 (Rev. AA) Page 13 of 19
AC Electrical Specifications
Parameter Description Condition Min. Max. Unit
Crystal
T
DC
XIN Duty Cycle The device will operate reliably with input
duty cycles up to 30/70 but the REF clock
duty cycle will not be within specification
47.5 52.5 %
T
PERIOD
XIN Period When XIN is driven from an external
clock source
69.841 71.0 ns
T
R
/T
F
XIN Rise and Fall Times Measured between 0.3V
DD
and 0.7V
DD
–10.0ns
T
CCJ
XIN Cycle to Cycle Jitter As an average over 1-s duration – 500 ps
L
ACC
Long-term Accuracy Measured at VDD/2 differential – 250 ppm
Clock Input
T
DC
CLKIN Duty Cycle Measured at VDD/2 47 53 %
T
R
/T
F
CLKIN Rise and Fall Times Measured between 0.2V
DD
and 0.8V
DD
0.5 4.0 V/ns
T
CCJ
CLKIN Cycle to Cycle Jitter Measured at VDD/2 – 250 ps
T
LTJ
CLKIN Long Term Jitter Measured at VDD/2 – 350 ps
V
IL
Input Low Voltage XIN / CLKIN pin – 0.8 V
V
IH
Input High Voltage XIN / CLKIN pin 2 VDD+0.3 V
I
IL
Input LowCurrent XIN / CLKIN pin, 0 < VIN <0.8 – 20 uA
I
IH
Input HighCurrent XIN / CLKIN pin, VIN = VDD – 35 uA
CPU at 0.7V
T
DC
CPUT and CPUC Duty Cycle Measured at 0V differential
45 55
%
T
PERIOD
100 MHz CPUT and CPUC Period Measured at 0V differential at 0.1s
9.99900 10.00100
ns
T
PERIOD
133 MHz CPUT and CPUC Period Measured at 0V differential at 0.1s
7.49925 7.50075
ns
T
PERIODSS
100 MHz CPUT and CPUC Period, SSC Measured at 0V differential at 0.1s
10.02406 10.02607
ns
T
PERIODSS
133 MHz CPUT and CPUC Period, SSC Measured at 0V differential at 0.1s
7.51804 7.51955
ns
T
PERIODAbs
100 MHz CPUT and CPUC Absolute
period
Measured at 0V differential at 1 clock
9.91400 10.0860
ns
T
PERIODAbs
133 MHz CPUT and CPUC Absolute
period
Measured at 0V differential at 1 clock
7.41425 7.58575
ns
T
PERIODSSAbs
100 MHz CPUT and CPUC Absolute
period, SSC
Measured at 0V differential at1 clock
9.914063 10.1362
ns
T
PERIODSSAbs
133 MHz CPUT and CPUC Absolute
period, SSC
Measured at 0V differential at1 clock
7.41430 7.62340
ns
T
CCJ
CPU Cycle to Cycle Jitter Measured at 0V differential – 85 ps
Skew CPU0 to CPU1 skew Measured at 0V differential – 100 ps
L
ACC
Long-term Accuracy Measured at 0V differential – 100 ppm
T
R
/ T
F
CPU Rising/Falling Slew rate Measured differentially from ±150 mV 2.5 8 V/ns
T
RFM
Rise/Fall Matching Measured single-endedly from ±75 mV – 20 %
V
HIGH
Voltage High 1.15 V
V
LOW
Voltage Low –0.3 – V
V
OX
Crossing Point Voltage at 0.7V Swing 300 550 mV
SRC at 0.7V
T
DC
SRC Duty Cycle Measured at 0V differential 45 55 %
T
PERIOD
100 MHz SRC Period Measured at 0V differential at 0.1s
9.99900 10.0010
ns
T
PERIODSS
100 MHz SRC Period, SSC Measured at 0V differential at 0.1s
10.02406 10.02607
ns
T
PERIODAbs
100 MHz SRC Absolute Period Measured at 0V differential at 1 clock
9.87400 10.1260
ns
T
PERIODSSAbs
100 MHz SRC Absolute Period, SSC Measured at 0V differential at 1 clock
9.87406 10.1762
ns
