ADG779
Rev. A | Page 6 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
IN
1
V
DD
2
GND
3
S2
6
D
5
S1
4
ADG779
TOP VIEW
(Not to Scale)
02491-002
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 IN Logic Control Input.
2 V
DD
Most Positive Power Supply Potential.
3 GND Ground (0 V) Reference.
4 S1 Source Terminal. Can be an input or an output.
5 D Drain Terminal. Can be an input or an output.
6 S2 Source Terminal. Can be an input or an output.
ADG779
Rev. A | Page 7 of 12
TERMINOLOGY
V
DD
Most positive power supply potential.
I
DD
Positive supply current.
GND
Ground (0 V) reference.
S
Source terminal. Can be an input or an output.
D
Drain terminal. Can be an input or an output.
IN
Logic control input.
V
D
(V
S
)
Analog voltage on drain (D) and source (S) terminals.
R
ON
Ohmic resistance between the D and S.
R
FLAT (ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured.
ΔR
ON
On-resistance mismatch between any two channels.
I
S
(Off)
Source leakage current with the switch off.
I
D
(Off)
Drain leakage current with the switch off.
I
D
, I
S
(On)
Channel leakage current with the switch on.
V
INL
Maximum input voltage for Logic 0.
V
INH
Minimum input voltage for Logic 1.
I
INL
(I
INH
)
Input current of the digital input.
C
S
(Off)
Off switch source capacitance. Measured with reference to
ground.
C
D
(Off)
Off switch drain capacitance. Measured with reference to
ground.
C
D
, C
S
(On)
On switch capacitance. Measured with reference to ground.
C
IN
Digital input capacitance.
t
ON
Delay time between the 50% and 90% points of the digital input
and switch on condition.
t
OFF
Delay time between the 50% and 90% points of the digital input
and switch off condition.
t
BBM
On or off time measured between the 80% points of both
switches when switching from one to another.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during on/off switching.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Crosstalk
A measure of unwanted signal that is coupled through from one
channel to another because of parasitic capacitance.
−3 dB Bandwidth
The frequency at which the output is attenuated by 3 dB.
On Response
The frequency response of the on switch.
Insertion Loss
The loss due to the on resistance of the switch.
THD + N
The ratio of harmonic amplitudes plus noise of a signal to the
fundamental.
ADG779
Rev. A | Page 8 of 12
TYPICAL PERFORMANCE CHARACTERISTICS
5.0
0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
6.0
5.5
V
D
OR V
S
– DRAIN OR SOURCE VOLTAGE (V)
R
ON
()
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
T
A
=25°C
V
DD
=2.7V
V
DD
=5V
V
DD
=3V
V
DD
=4.5V
0
2491-003
Figure 3. On Resistance as a Function of V
D
(V
S
) Single Supplies
5.0
0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
6.0
5.5
V
D
OR V
S
– DRAIN OR SOURCE VOLTAGE (V)
R
ON
()
0 0.5 1.0 1.5 2.0 2.5 3.0
V
DD
= 3V
+85°C
+25°C
–40°C
02491-004
Figure 4. On Resistance as a Function of V
D
(V
S
) for
Different Temperatures V
DD
= 3 V
V
DD
= 5V
+85°C
+25°C
–40°C
5.0
0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
6.0
5.5
V
D
OR V
S
– DRAIN OR SOURCE VOLTAGE (V)
R
ON
()
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
02491-005
Figure 5. On Resistance as a Function of V
D
(V
S
) for
Different Temperatures V
DD
= 5 V
TEMPERATURE (°C)
0.15
0.10
–0.05
0.05
0
V
DD
=5V
V
D
=4.5V/1V
V
S
=1V/4.5V
I
D
,I
S
(ON)
I
S
(OFF)
0 102030405060708090
CURRENT (nA)
02491-006
Figure 6. Leakage Currents as a Function of Temperature
TEMPERATURE (°C)
0.15
0.10
–0.05
0.05
0
V
DD
= 3V
V
D
= 3V/1V
V
S
= 1V/3V
0 102030405060708090
CURRENT (nA)
I
D
, I
S
(ON)
I
S
(OFF)
02491-007
Figure 7. Leakage Currents as a Function of Temperature
1n
10n
100n
10µ
100µ
1m
10
m
V
DD
= 5V
1 10 100 1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
I
SUPPLY
(A)
0
2491-008
Figure 8. Supply Current vs. Input Switching Frequency

ADG779BKSZ-REEL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog Switch ICs IC 2.5 Ohms 5.5V CMOS SPDT 2:1 Mux
Lifecycle:
New from this manufacturer.
Delivery:
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