PCA9541_7 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 7.1 — 24 June 2015 6 of 42
NXP Semiconductors
PCA9541
2-to-1 I
2
C-bus master selector with interrupt logic and reset
7.2 Pin description
[1] HVQFN16 package die supply ground is connected to both the V
SS
pin and the exposed center pad. The
V
SS
pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical,
and board-level performance, the exposed pad needs to be soldered to the board using a corresponding
thermal pad on the board, and for proper heat conduction through the board thermal vias need to be
incorporated in the printed-circuit board in the thermal pad region.
Table 3. Pin description
Symbol Pin Description
SO16,
TSSOP16
HVQFN16
INT0
1 15 active LOW interrupt output 0 (external pull-up required)
SDA_MST0 2 16 serial data master 0 (external pull-up required)
SCL_MST0 3 1 serial clock master 0 (external pull-up required)
RESET
4 2 active LOW reset input (external pull-up required)
SCL_MST1 5 3 serial clock master 1 (external pull-up required)
SDA_MST1 6 4 serial data master 1 (external pull-up required)
INT1
7 5 active LOW interrupt output 1 (external pull-up required)
V
SS
86
[1]
supply ground
A0 9 7 address input 0 (externally held to V
SS
or V
DD
)
A1 10 8 address input 1 (externally held to V
SS
or V
DD
)
A2 11 9 address input 2 (externally held to V
SS
or V
DD
)
A3 12 10 address input 3 (externally held to V
SS
or V
DD
)
SCL_SLAVE 13 11 serial clock slave (external pull-up required)
SDA_SLAVE 14 12 serial data slave (external pull-up required)
INT_IN
15 13 active LOW interrupt input (external pull-up required)
V
DD
16 14 supply voltage
