1
®
FN6462.0
PX3511A, PX3511B
Advanced Synchronous Rectified Buck
MOSFET Drivers with Protection Features
The PX3511A and PX3511B are high frequency MOSFET
drivers specifically designed to drive upper and lower power
N-Channel MOSFETs in a synchronous rectified buck
converter topology. These drivers combined with the
ISL6595 Digital Multi-Phase Buck PWM controller and
N-Channel MOSFETs form a complete core-voltage
regulator solution for advanced microprocessors.
The PX3511A drives the upper gate to 12V, while the lower
gate can be independently driven over a range from 5V to
12V. The PX3511B drives both upper and lower gates over a
range of 5V to 12V. This drive-voltage provides the flexibility
necessary to optimize applications involving trade-offs
between gate charge and conduction losses.
An adaptive zero shoot-through protection is integrated to
prevent both the upper and lower MOSFETs from conducting
simultaneously and to minimize the dead time. These
products add an overvoltage protection feature operational
before VCC exceeds its turn-on threshold, at which the
PHASE node is connected to the gate of the low side
MOSFET (LGATE). The output voltage of the converter is
then limited by the threshold of the low side MOSFET, which
provides some protection to the microprocessor if the upper
MOSFET(s) is shorted during initial start-up.
These drivers also feature a three-state PWM input which,
working together with Intersil’s multi-phase PWM controllers,
prevents a negative transient on the output voltage when the
output is shut down. This feature eliminates the Schottky
diode that is used in some systems for protecting the load
from reversed output voltage events.
Features
Dual MOSFET Drives for Synchronous Rectified Bridge
Adjustable Gate Voltage (5V to 12V) for Optimal Efficiency
36V Internal Bootstrap Schottky Diode
Bootstrap Capacitor Overcharging Prevention
Supports High Switching Frequency (up to 2MHz)
- 3A Sinking Current Capability
- Fast Rise/Fall Times and Low Propagation Delays
Three-State PWM Input for Output Stage Shutdown
Three-State PWM Input Hysteresis for Applications With
Power Sequencing Requirement
Pre-POR Overvoltage Protection
VCC Undervoltage Protection
Expandable Bottom Copper Pad for Enhanced Heat
Sinking
Dual Flat No-Lead (DFN) Package
- Near Chip-Scale Package Footprint; Improves PCB
Efficiency and Thinner in Profile
Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
Core Regulators for Intel® and AMD® Microprocessors
High Current DC/DC Converters
High Frequency and High Efficiency VRM and VRD
Related Literature
Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
Technical Brief TB417 for Power Train Design, Layout
Guidelines, and Feedback Compensation Design
Data Sheet February 26, 2007
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
2
FN6462.0
February 26, 2007
Ordering Information
PART NUMBER PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. #
PX3511ADAG (Note) PX3511 ADAG 0 to +85 8 Ld SOIC (Pb-free) M8.15
PX3511ADAG-R3 (Note) PX3511 ADAG 0 to +85 8 Ld SOIC (Pb-free) Tape and Reel M8.15
PX3511ADDG 11AD 0 to +85 10 Ld 3x3 DFN L10.3x3
PX3511ADDG-RA 11AD 0 to +85 10 Ld 3x3 DFN Tape and Reel L10.3x3
PX3511BDAG (Note) PX351 BDAG 0 to +85 8 Ld SOIC (Pb-free) M8.15
PX3511BDAG-R3 (Note) PX3511 BDAG 0 to +85 8 Ld SOIC (Pb-free) Tape and Reel M8.15
PX3511BDDG 11BD 0 to +85 10 Ld 3x3 DFN L10.3x3
PX3511BDDG-RA 11BD 0 to +85 10 Ld 3x3 DFN Tape and Reel L10.3x3
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pinouts
PX3511ACB, PX3511BCB
(8 LD SOIC)
TOP VIEW
PX3511ACR, PX3511BCR
(10 LD 3x3 DFN)
TOP VIEW
UGATE
BOOT
PWM
GND
1
2
3
4
8
7
6
5
PHASE
PVCC
VCC
LGATE
1
2
3
4
5
9
8
7
6
10
USB
PPR
CHG
NTC or OVP
USBP
IUSB
ICDL
GND
BAT
or EN
CRDL
UGATE
BOOT
N/C
GND
PHASE
PWM
PVCC
N/C
VCC
LGATE
Block Diagram
PX3511A AND PX3511B
PVCC
VCC
PWM
+5V
10K
8K
BOOT
UGATE
PHASE
LGATE
GND
FOR DFN -DEVICES, THE PAD ON THE BOTTOM SIDE OF
PAD
THE PACKAGE MUST BE SOLDERED TO THE CIRCUIT’S GROUND.
UVCC = VCC FOR PX3511A
CONTROL
LOGIC
POR/
SHOOT-
THROUGH
PROTECTION
Pre-POR OVP
(LVCC)
UVCC = PVCC FOR PX3511B
UVCC
FEATURES
PX3511A, PX3511B
3
FN6462.0
February 26, 2007
Typical Application - 4 Channel Converter Using ISL6595 and PX3511A Gate Drivers
+12V
+5V
RTHERM
+3.3V
FROM µP
I2C I/F
BUS
TO µP
FAULT
OUTPUTS
PX3511
PX3511
PX3511
PX3511
Vout
RTN
8
7
5
6
8
7
5
6
8
7
5
6
8
7
5
6
1
2
4
3
1
2
4
3
1
2
4
3
1
2
4
3
ISL6595
V12_SEN
GND
OUT1
OUT2
ISEN1
OUT3
OUT4
ISEN2
OUT5
OUT6
ISEN3
OUT7
OUT8
ISEN4
OUT9
OUT10
ISEN5
OUT11
OUT12
ISEN6
TEMP_SEN
CAL_CUR_EN
CAL_CUR_SEN
VSENP
VSENN
VDD
VID4
VID3
VID2
VID1
VID0
VID5
LL0
LL1
OUTEN
VCC_PWRGD
RESET_N
FAULT1
FAULT2
SDA
SCL
SADDR
ISEN5
UGATE
BOOT
PWM
GND
PHASE
PVCC
VCC
LGATE
UGATE
BOOT
PWM
GND
PHASE
PVCC
VCC
LGATE
UGATE
BOOT
PWM
GND
PHASE
PVCC
VCC
LGATE
UGATE
BOOT
PWM
GND
PHASE
PVCC
VCC
LGATE
PX3511A, PX3511B

PX3511ADDG

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Gate Drivers DRVR SEE ISL6594X LGATE DETECT 10LD
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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