NCP4201
http://onsemi.com
8
ELECTRICAL CHARACTERISTICS V
IN
= 5.0 V, FBRTN = GND for typical values T
A
= 0°C to 85°C, unless otherwise noted.
(Note 1 and 3).
Parameter UnitMaxTypMinConditionsSymbol
POWER−GOOD COMPARATOR
Undervoltage Threshold
V
PWRGD(UV)
Relative to nominal DAC output −600 −500 −400 mV
Undervoltage Adjustment Range
Low
PWRGD_LO Register = 000 −500 mV
Undervoltage Adjustment Range
High
PWRGD_LO Register = 111 −150 mV
Overvoltage Threshold V
PWRGD(OV)
Relative to DAC output, PWRGD_Hi = 00 200 300 400 mV
Overvoltage Adjustment Range
Low
PWRGD_Hi Register = 11 150 mV
Overvoltage Adjustment Range
High
PWRGD_Hi Register = 00 300 mV
Output Low Voltage V
OL(PWRGD)
I
PWRGD(SINK)
= −4 mA 150 300 mV
Power Good Delay Time
During Soft−Start Internal Timer 2.0 ms
VID Code Changing 100 250
ms
VID Code Static 200 ns
Crowbar Trip Point V
CROWBAR
Relative to DAC output, PWRGD_Hi = 00 200 300 400 mV
Crowbar Adjustment Range PWRGD_HI Register 150 300 mV
Crowbar Reset Point Relative to FBRTN 250 300 350 mV
Crowbar Delay Time t
CROWBAR
Overvoltage to PWM going low
VID Code Changing 100 250
ms
VID Code Static 400 ns
PWM OUTPUTS
Output Low Voltage
I
PWM(SINK)
=
−400 mA
V
OL(PWM)
160 500 mV
Output High Voltage I
PWM(SOURCE)
= 400 mA
V
OH(PWM)
4.0 5.0 V
PMBus INTERFACE
Logic High Input Voltage
V
IH(SDA,
SCL)
2.1 V
Logic Input Low Voltage V
IL(SDA,
SCL)
0.8 V
Hysteresis 500 mV
SDA Output Low Voltage V
OL
I
SDA
= −6 mA 0.4 V
Input Current I
IH
; I
IL
−1.0 1.0
mA
Input Capacitance C
SCL,
SDA
5.0 pF
Clock Frequency f
SCL
400 kHz
SCL Falling Edge to SDA Valid
Time
1.0
ms
ALERT / FAULT OUTPUTS
Output Low Voltage
V
OL
I
OUT
= −6 mA 0.4 V
Output High Leakage Current I
OH
V
OH
= 5.0 V 1.0 uA
ANALOG / DIGITAL CONVERTER
ADC Input Voltage Range
0 2.0 V
Total Unadjusted Error (TUE) ±1.0 %
Differential Non−linearity (DNL) 8 Bits 1.0 LSB
Conversion Time, Voltage
Channel
Averaging Enabled (32 averages) 80 ms
