IDT
®
Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA 1541C—12/16/10
ICS9FG104D
Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA
5
Electrical Characteristics - DIF 0.7V Current Mode Differential Pair
T
A
= T
AMBIENT
; V
DD
= 3.3 V +/-5%; C
L
=2pF, R
S
=33.2
Ω
, R
P
=49.9
Ω
, I
REF
= 475
Ω
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
Output Impedance
Zo
1
V
O
= V
x
3000
Ω
1
Voltage High VHigh 660 850 1
Voltage Low VLow -150 150 1
Max Voltage Vovs 1150 1
Min Voltage Vuds -300 1
Crossing Voltage (abs) Vcross(abs) 250 550 mV 1
Crossing Voltage (var) d-Vcross Crossing variation over all edges 140 mV 1
Long Accuracy ppm see Tperiod min-max values -300 300 ppm 1,2,5
400MHz nominal 2.49988 2.5000 2.5001 ns 2
400MHz spread 2.4993 2.5133 ns 2,3
333.33MHz nominal 2.99985 3.0000 3.0002 ns 2
333.33MHz spread 2.9991 3.016 ns 2,3
266.66MHz nominal 3.74981 3.7500 3.7502 ns 2
266.66MHz spread 3.7489 3.77 ns 2,3
200MHz nominal 4.9998 5.0000 5.0003 ns 2
200MHz spread 4.9985 5.0266 ns 2,3
166.66MHz nominal 5.9997 6.0000 6.0003 ns 2
166.66MHz spread 5.9982 6.0320 ns 2,3
133.33MHz nominal 7.4996 7.5000 7.5004 ns 2
133.33MHz spread 7.4978 5.4000 ns 2,3
100.00MHz nominal 9.9995 10.0000 10.0005 ns 2
100.00MHz spread 9.9970 10.0533 ns 2,3
400MHz nominal/spread 2.4143 ns 1,2
333.33MHz nominal/spread 2.9141 ns 1,2
266.66MHz nominal/spread 3.6639 ns 1,2
200MHz nominal/spread 4.8735 ns 1,2
166.66MHz nominal/spread 5.8732 ns 1,2
133.33MHz nominal/spread 7.3728 ns 1,2
100.00MHz nominal/spread 9.8720 ns 1,2
Rise Time t
r
V
OL
= 0.175V, V
OH
= 0.525V 175 700 ps 1
Fall Time t
f
V
OH
= 0.525V V
OL
= 0.175V 175 700 ps 1
Rise Time Variation d-t
r
125 ps 1
Fall Time Variation d-t
f
125 ps 1
Duty Cycle d
t3
Measured Differentially 45 55 % 1
Skew, output to output t
sk3
V
= 50% 35 ps 1
Jitter, Cycle to cycle t
jcyc-cyc
Measured Differentially 50 ps 1
1
Guaranteed by design and characterization, not 100% tested in production.
3
Figures are for down spread.
Absolute min period
Statistical measurement on
single ended signal using
oscilloscope math function.
5
+/- 50
m at an
fre
uenc
with s
read off
4
This figure is the peak-to-peak phase jitter as defined by PCI-SIG for a PCI Express reference clock. Please visit
http://www.pcisig.com for additional details
2
All Lon
Term Accurac
and Clock Period s
ecifications are
uaranteed assumin
that REFOUT is tuned to 0
mV
Measurement on single ended
signal using absolute value.
mV
T
absmin
Average period Tperiod