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Document Number: 68920
S10-0548-Rev. B, 08-Mar-10
Vishay Siliconix
Si5913DC
Notes:
a. Based on T
C
= 25 °C.
b. Surface mounted on 1" x 1" FR4 board.
c. t = 5 s
d. Maximum under steady state conditions is 115 °C/W.
e. Maximum under steady state conditions is 130 °C/W.
f. Package limited.
g. See Solder Profile (www.vishay.com/doc?73257
). The ChipFET is a leadless package. The end of the lead terminal is exposed copper (not
plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed an is not required
to ensure adequate bottom side soldering interconnection.
h. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components.
THERMAL RESISTANCE RATINGS
Parameter Symbol Typical Maximum Unit
Maximum Junction-to-Ambient (MOSFET)
b, d
t ≤ 5 s
R
thJA
62 74
°C/W
Maximum Junction-to-Foot (Drain) (MOSFET)
Steady State
R
thJF
32 40
Maximum Junction-to-Ambient (Schottky)
b, e
t ≤ 5 s
R
thJA
77 95
Maximum Junction-to-Foot (Drain) (Schottky)
Steady State
R
thJF
33 40
SPECIFICATIONS T
J
= 25 °C, unless otherwise noted
Parameter Symbol Test Conditions Min. Typ. Max. Unit
Static
Drain-Source Breakdown Voltage
V
DS
V
GS
= 0 V, I
D
= - 250 µA
- 20 V
V
DS
Temperature Coefficient ΔV
DS
/T
J
I
D
= - 250 µA
- 20
mV/°C
V
GS(th)
Temperature Coefficient ΔV
GS(th)
/T
J
3
Gate-Source Threshold Voltage
V
GS(th)
V
DS
= V
GS
, I
D
= - 250 µA
- 0.6 - 1.5 V
Gate-Source Leakage
I
GSS
V
DS
= 0 V, V
GS
= ± 12 V
± 100 nA
Zero Gate Voltage Drain Current
I
DSS
V
DS
= - 20 V, V
GS
= 0 V
- 1
µA
V
DS
= - 20 V, V
GS
= 0 V, T
J
= 55 °C
- 10
On-State Drain Current
a
I
D(on)
V
DS
≤ 5 V, V
GS
= - 10 V - 15 A
Drain-Source On-State Resistance
a
R
DS(on)
V
GS
= - 10 V, I
D
= - 3.7 A
0.070 0.084
Ω
V
GS
= - 4.5 V, I
D
= - 3.2 A
0.090 0.108
V
GS
= - 2.5 V, I
D
= - 2.5 A
0.140 0.175
Forward Transconductance
a
g
fs
V
DS
= - 10 V, I
D
= - 3.7 A
6S
Dynamic
b
Input Capacitance
C
iss
V
DS
= - 10 V, V
GS
= 0 V, f = 1 MHz
330
pFOutput Capacitance
C
oss
80
Reverse Transfer Capacitance
C
rss
57
Total Gate Charge
Q
g
V
DS
= - 10 V, V
GS
= - 10 V, I
D
= - 3.7 A
812
nC
V
DS
= - 10 V, V
GS
= - 4.5 V, I
D
= - 3.7 A
46
Gate-Source Charge
Q
gs
0.8
Gate-Drain Charge
Q
gd
1.4
Gate Resistance
R
g
f = 1 MHz 1.2 6 12 Ω
Tur n - O n D e l ay Time
t
d(on)
V
DD
= - 10 V, R
L
= 3.4 Ω
I
D
≅ - 2.9 A, V
GEN
= - 10 V, R
g
= 1 Ω
36
ns
Rise Time
t
r
10 20
Turn-Off DelayTime
t
d(off)
16 24
Fall Time
t
f
815
Tur n - O n D e l ay Time
t
d(on)
V
DD
= - 10 V, R
L
= 3.4 Ω
I
D
≅ - 2.9 A, V
GEN
= - 4.5 V, R
g
= 1 Ω
18 27
Rise Time
t
r
40 60
Turn-Off DelayTime
t
d(off)
18 27
Fall Time
t
f
10 15