1
High Speed, Dual Channel, 6A, Power MOSFET Driver
With Programmable Delays
ISL89166, ISL89167, ISL89168
The ISL89166, ISL89167, and ISL89168 are high-speed, 6A,
dual channel MOSFET drivers. These parts are similar to the
ISL89160, ISL89161, ISL89162 drivers but use the NC pins for
programming the rising edge time delays of the outputs used for
dead time control.
As an alternative to using external RC circuits for time delays, the
programmable delays on the RDTA and RDTB pins allows the
user to delay the rising edge of the respective outputs just by
connecting an appropriate resistor value between these pins and
ground. The accuracy and temperature characteristics of the
time delays are specified freeing the user of the need to select
appropriate external resistors and capacitors that traditionally
are applied to the logic inputs to delay the output edges.
At high switching frequencies, these MOSFET drivers use very
little internal bias currents. Separate, non-overlapping drive
circuits are used to drive each CMOS output FET to prevent
shoot-thru currents in the output stage.
The start-up sequence is design to prevent unexpected glitches
when V
DD
is being turned on or turned off. When V
DD
< ~1V, an
internal 10k resistor between the output and ground helps to
keep the output voltage low. When ~1V <V
DD
< UV, both outputs
are driven low with very low resistance and the logic inputs are
ignored. This insures that the driven FETs are off. When
V
DD
> UVLO, and after a short delay, the outputs now respond to
the logic inputs.
Features
•Typical ON-resistance <1
Specified Miller plateau drive currents
Very low thermal impedance (
JC
= 3°C/W)
Hysteretic Input logic levels for 3.3V CMOS, 5V CMOS, and TTL
Precision threshold inputs for optional time delays with
external RC components
Instead of RC components for time delays, a resistor can be
used to program delays
20ns rise and fall time driving a 10nF load.
NC pins may be connected to ground or VDD for flexible PCB
layout options
Applications
Synchronous Rectifier (SR) Driver
Switch mode power supplies
Motor Drives, Class D amplifiers, UPS, Inverters
Pulse Transformer Driver
Clock/Line Driver
8
6
7
1
4
3
2
5
EPAD
V
DD
4.7µF
RDTBRDTA
INA
INB
GND
OUTA
OUTB
FIGURE 1. TYPICAL APPLICATION
0
50
100
150
200
250
300
350
0 5 10 15 20
DELAY (ns)
RDT (2k to 20k)
FIGURE 2. PROGRAMMABLE TIME DELAYS
-40°C (WORST CASE)
+25°C (TYPICAL)
+125°C (WORST CASE)
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|Copyright Intersil Americas LLC 2011-2013. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
February 26, 2013
FN7720.2
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ISL89166, ISL89167, ISL89168
2
FN7720.2
February 26, 2013
Block Diagram
OUTx
V
DD
INx
GND
For clarity, only one
channel is shown
EPAD
For proper thermal and electrical
performance, the EPAD must be
connected to the PCB ground plane.
Separate FET drives, with
non-overlapping outputs,
prevent shoot-thru
currents in the output
CMOS FETs resulting with
very low operating
currents.
ISL89167,
ISL89168
ISL89166
10k
The UV comparator holds off
the outputs until V
DD
~>
3.3VDC.
rising
edge
delay
RDTx

RDTx
Pin Configurations
ISL89166FR, ISL89166FB
(8 LD TDFN, EPSOIC)
TOP VIEW
ISL89167FR, ISL89167FB
(8 LD TDFN, EPSOIC)
TOP VIEW
ISL89168FR, ISL89168FB
(8 LD TDFN, EPSOIC)
TOP VIEW
INA
GND
IN B O UT B
OUTA
RDTB
RDTA
VDD
8
6
7
1
4
3
2
5
/INA
GND
/INB OUTB
OUTA
RDTB
RDTA
VDD
8
6
7
1
4
3
2
5
/INA
GND
IN B O UT B
OUTA
RDTB
RDTA
VDD
8
6
7
1
4
3
2
5
Pin Descriptions
PIN
NUMBER SYMBOL DESCRIPTION
1 RDTA Connect a resistor between this pin and
ground to program the rising edge delay of
OUTA, 0k to 20k
2 INA or /INA Channel A input, 0V to VDD
3 GND Power Ground, 0V
4 INB or /INB Channel B enable, 0V to VDD
5 OUTB Channel B output
6 VDD Power input, 4.5V to 16V
7 OUTA Channel A output, 0V to VDD
8 RDTB Connect a resistor between this pin and
ground to program the rising edge delay of
OUTB, 0k to 20k
EPAD Power Ground, 0V
ISL89166, ISL89167, ISL89168
3
FN7720.2
February 26, 2013
Ordering Information
PART NUMBER
(Notes 1, 2, 3) PART MARKING TEMP RANGE (°C) INPUT CONFIGURATION
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL89166FRTAZ 166A -40 to +125 non-inverting 8 Ld 3x3 TDFN L8.3x3I
ISL89167FRTAZ 167A -40 to +125 inverting 8 Ld 3x3 TDFN L8.3x3I
ISL89168FRTAZ 168A -40 to +125 inverting + non-inverting 8 Ld 3x3 TDFN L8.3x3I
ISL89166FBEAZ 89166 FBEAZ -40 to +125 non-inverting 8 Ld EPSOIC M8.15D
ISL89167FBEAZ 89167 FBEAZ -40 to +125 inverting 8 Ld EPSOIC M8.15D
ISL89168FBEAZ 89168 FBEAZ -40 to +125 inverting + non-inverting 8 Ld EPSOIC M8.15D
NOTES:
1. Add “-T*”, suffix for tape and reel. Please refer to TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL89166,
ISL89167, ISL89168. For more information on MSL, please
see Technical Brief TB363
.

ISL89168FBEAZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Gate Drivers 6A PEAK HI SPD PWR MSFT DRVR 8LD EP
Lifecycle:
New from this manufacturer.
Delivery:
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