Philips Semiconductors
PHD22NQ20T
N-channel TrenchMOS™ standard level FET
Product data Rev. 01 — 08 March 2004 2 of 12
9397 750 12882
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
3. Ordering information
4. Limiting values
Table 2: Ordering information
Type number Package
Name Description Version
PHD22NQ20T D-PAK Plastic single-ended surface mounted package; 3 leads (one lead cropped) SOT428
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
drain-source voltage (DC) 25 °C ≤ T
j
≤ 175 °C - 200 V
V
DGR
drain-gate voltage (DC) 25 °C ≤ T
j
≤ 175 °C; R
GS
=20kΩ - 200 V
V
GS
gate-source voltage (DC) - ±20 V
I
D
drain current (DC) T
mb
=25°C; V
GS
=10V;Figure 2 and 3 - 21.1 A
T
mb
= 100 °C; V
GS
=10V;Figure 2 - 14.9 A
I
DM
peak drain current T
mb
=25°C; pulsed; t
p
≤ 10 µs; Figure 3 - 42.2 A
P
tot
total power dissipation T
mb
=25°C; Figure 1 - 150 W
T
stg
storage temperature −55 +175 °C
T
j
junction temperature −55 +175 °C
Source-drain diode
I
S
source (diode forward) current (DC) T
mb
=25°C - 21.6 A
I
SM
peak source (diode forward) current T
mb
=25°C; pulsed; t
p
≤ 10 µs - 42.2 A
Avalanche ruggedness
E
DS(AL)S
non-repetitive drain-source
avalanche energy
unclamped inductive load; I
D
= 9.3 A;
t
p
= 0.13 ms; V
DD
≤ 200 V; R
GS
=50Ω;
V
GS
= 10 V; starting at T
j
=25°C
- 150 mJ
