BU2050F,BU2092F,BU2092FV,BU2099FV,BD7851FP,BU2152FS
Technical Note
16/24
www.rohm.com
2009.06 - Rev.A
© 2009 ROHM Co., Ltd. All rights reserved.
BD7851FP
Timing characteristics (Unless otherwise specified, VCC=5V, Ta=25)
Parameter Symbol
Limit
Unit Condition
Min. Typ. Max.
Frequency CLOCK fclk - - 10 MHz
Pulse Width CLOCK t
wh
20 50 - ns CLOCK
Pulse Width LATCH t
wh
40 50 - ns LATCH
Pulse Width ENABLE t
w
30 - - ns ENABLE
Rise Time / Fall Time t
r
/ t
f
- 30 100 ns CLOCK
Setup Time t
SU
30 50 -
ns
S_IN-CLOCK
30 50 - LATCH-CLOCK
Hold Time t
h
30 50 -
ns
S_IN-CLOCK
30 50 - LATCH-CLOCK
Rise Time t
r
- 300 -
ns
OUTn
- - 50 SOUT
Fall Time t
f
- 300 -
ns
OUTn
- - 50 SOUT
Propagation
t
pLH
- 400 650
ns
CLK-SOUT, LATCH
ENABLE-OUTn
t
pHL
- 300 400
CLK-SOUT, LATCH
ENABLE-OUTn
Reference Current of Output Current
This is a data for the standard sample, not guaranteed the characteristic.
Fig. 13
R_Iref-VOUT
Notes the increase of consumption current Icc, in case sets the voltage of VOUT lower. See the graph above.
Fig. 14
0
50
100
150
200
250
0.1 1 10 100
R_Iref [k
Ω
]
I
OUT
[mA]
[Condition]
Vcc=5.0V, Vo=5.0V, Ta=25
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1 10 100
R_Iref [k
Ω
]
V
OUT
[V]
[Condition]
Vcc=5.0V, Ta=27, all bit : ON
The reference current of output current is determined by the
external resistor.
(between 2pin and GND )
BU2050F,BU2092F,BU2092FV,BU2099FV,BD7851FP,BU2152FS
Technical Note
17/24
www.rohm.com
2009.06 - Rev.A
© 2009 ROHM Co., Ltd. All rights reserved.
BD7851FP
Test Circuit 1
Fig. 15
Test Circuit 2
R=51 (note : R_Iref=1.3k) , C=15pF
Fig. 16
1
2
3
4
5
6
7
8
9
10
11
12
13
19
18
17
16
15
14
25
24
23
22
21
20
BD7851FP
GND
R
_
Iref
LATCH
S
_
IN
OUT16
OUT15
OUT14
OUT13
OUT12
OUT11
OUT10
OUT9
OUT8
OUT7
OUT6
P_GND
OUT5
OUT4
OUT3
OUT2
OUT1
SOUT
CLOCK
ENABLE
Vcc
Vcc
ENABLE
SOUT
CLOCK
VE
P_GND
S_IN
LATCH
R
1
2
3
4
5
6
7
8
9
10
11
12
13
19
18
17
16
15
14
25
24
23
22
21
20
BD7851FP
GND
R
_
Iref
LATCH
S
_
IN
OUT16
OUT15
OUT14
OUT13
OUT12
OUT11
OUT10
OUT9
OUT8
OUT7
OUT6
P_GND
OUT5
OUT4
OUT3
OUT2
OUT1
SOUT
CLOCK
ENABLE
Vcc
Vcc
ENABLE
SOUT
CLOCK
VE
P_GND
S_IN
LATCH
R
BU2050F,BU2092F,BU2092FV,BU2099FV,BD7851FP,BU2152FS
Technical Note
18/24
www.rohm.com
2009.06 - Rev.A
© 2009 ROHM Co., Ltd. All rights reserved.
BD7851FP
Switching Time Test Waveforms
Fig. 17
CLOCK
t
SU
0.2×VCC
t
h
t
Wh
t
r
0.8×VCC 0.8×VCC
0.2×VCC
t
f
0.8×VCC
S_IN
0.8×VCC 0.8×VCC
LATCH
t
h
t
wh
0.8×VCC
0.2×VCC
t
SU
OUTn
90%
10%
t
pHL
t
pLH
90%
10%
t
pHL
t
f
t
pHL
90%
10%
t
r
ENABLE
0.2×VCC
0.8×VCC
t
w
SOUT
0.8×VCC
0.2×VCC
t
pHL
t
pLH
t
f
t
r

BU2099FV-E2

Mfr. #:
Manufacturer:
Description:
Gate Drivers DRV 12BIT I/O
Lifecycle:
New from this manufacturer.
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