MAX1282/MAX1283
300ksps/400ksps, Single-Supply, 4-Channel,
Serial 12-Bit ADCs with Internal Reference
______________________________________________________________________________________ 19
TMS320LC3x Interface
Figure 17 shows an application circuit to interface the
MAX1282/MAX1283 to the TMS320 in external clock
mode. The timing diagram for this interface circuit is
shown in Figure 18.
Use the following steps to initiate a conversion in the
MAX1282/MAX1283 and to read the results:
1) The TMS320 should be configured with CLKX (trans-
mit clock) as an active-high output clock and CLKR
(TMS320 receive clock) as an active-high input clock.
CLKX and CLKR on the TMS320 are connected to
the MAX1282/MAX1283’s SCLK input.
2) The MAX1282/MAX1283’s CS pin is driven low by the
TMS320’s XF_ I/O port to enable data to be clocked
into the MAX1282/MAX1283’s DIN pin.
3) An 8-bit word (1XXXXX11) should be written to the
MAX1282/MAX1283 to initiate a conversion and
place the device into normal operating mode. See
Table 3 to select the proper XXXXX bit values for your
specific application.
4) The MAX1282/MAX1283’s SSTRB output is moni-
tored through the TMS320’s FSR input. A falling
edge on the SSTRB output indicates that the conver-
sion is in progress and data is ready to be received
from the device.
5) The TMS320 reads in 1 data bit on each of the next
16 rising edges of SCLK. These data bits represent
the 12-bit conversion result followed by 4 trailing bits,
which should be ignored.
6) Pull CS high to disable the MAX1282/MAX1283 until
the next conversion is initiated.
+3.3V
510k
24k
100k
0.047µF
12
REFADJ
MAX1282
MAX1283
Figure 12. MAX1282/MAX1283 Reference-Adjust Circuit
OUTPUT CODE
FULL-SCALE
TRANSITION
11 . . . 111
11 . . . 110
11 . . . 101
00 . . . 011
00 . . . 010
00 . . . 001
00 . . . 000
123
0
(COM)
FS
FS - 3/2LSB
FS = V
REF
+ V
COM
ZS = V
COM
INPUT VOLTAGE (LSB)
1LSB =
V
REF
4096
Figure 13. Unipolar Transfer Function, Full Scale (FS) =
V
REF
+ V
COM
, Zero Scale (ZS) = V
COM
011
. . .
111
011
. . .
110
000
. . .
010
000
. . .
001
000
. . .
000
111
. . .
111
111
. . .
110
111
. . .
101
100
. . .
001
100
. . .
000
- FS
COM*
INPUT VOLTAGE (LSB)
OUTPUT CODE
ZS = V
COM
+FS - 1LSB
*V
COM
V
REF
/ 2
+ V
COM
FS
=
V
REF
2
-FS = + V
COM
-V
REF
2
1LSB =
V
REF
4096
Figure 14. Bipolar Transfer Function, Full Scale (FS) =
V
REF
/ 2 + V
COM
, Zero Scale (ZS) = V
COM
MAX1282/MAX1283
300ksps/400ksps, Single-Supply, 4-Channel,
Serial 12-Bit ADCs with Internal Reference
20 ______________________________________________________________________________________
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values
from a straight line on an actual transfer function. This
straight line can be a best-straight-line fit or a line
drawn between the endpoints of the transfer function,
once offset and gain errors have been nullified. The
static linearity parameters for the MAX1282/MAX1283
are measured using the best straight-line fit method.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1LSB. A
DNL error specification of less than 1LSB guarantees
no missing codes and a monotonic transfer function.
Aperture Width
Aperture width (t
AW
) is the time the T/H circuit requires
to disconnect the hold capacitor from the input circuit
(for instance, to turn off the sampling bridge, and put
the T/H unit in hold mode).
Aperture Jitter
Aperture jitter (t
AJ
) is the sample-to-sample variation in
the time between the samples.
Aperture Delay
Aperture delay (t
AD
) is the time defined between the
rising edge of the sampling clock and the instant when
an actual sample is taken.
Signal-to-Noise Ratio (SNR)
For a waveform perfectly reconstructed from digital
samples, the SNR is the ratio of the full-scale analog
input (RMS value) to the RMS quantization error (resid-
ual error). The ideal, theoretical minimum analog-to-dig-
ital noise is caused only by quantization error and
results directly from the ADC’s resolution (N bits):
SNR = (6.02
N + 1.76)dB
In reality, there are other noise sources besides quanti-
zation noise, including thermal noise, reference noise,
clock jitter, etc. Therefore, SNR is calculated by taking
the ratio of the RMS signal to the RMS noise, which
includes all spectral components minus the fundamen-
tal, the first five harmonics, and the DC offset.
Signal-to-Noise Plus
Distortion (SINAD)
SINAD is the ratio of the fundamental input frequency’s
RMS amplitude to RMS equivalent of all other ADC out-
put signals:
SINAD (dB) = 20 log (Signal
RMS
/ Noise
RMS
)
Effective Number of Bits (ENOB)
ENOB indicates the global accuracy of an ADC at a
specific input frequency and sampling rate. An ideal
ADC’s error consists only of quantization noise. With an
input range equal to the ADC’s full-scale range, calcu-
late ENOB as follows:
ENOB = (SINAD - 1.76) / 6.02
Total Harmonic Distortion (THD)
THD is the ratio of the RMS sum of the input signal’s
first five harmonics to the fundamental itself. This is
expressed as:
where V
1
is the fundamental amplitude, and V
2
through
V5 are the amplitudes of the 2nd- through 5th-order
harmonics.
Spurious-Free Dynamic Range (SFDR)
SFDR is the ratio of the RMS amplitude of the funda-
mental (maximum signal component) to the RMS value
of the next-largest distortion component.
THD 20 log
VVVVV
V
2
2
3
2
4
2
4
2
5
2
1
++++
+3V
+3V
SUPPLIES
DGND+3VV
DD2
COM
GNDV
DD1
DIGITAL
CIRCUITRY
MAX1282
MAX1283
*R = 10
*OPTIONAL
GND
Figure 15. Power-Supply Grounding Connection
MAX1282/MAX1283
300ksps/400ksps, Single-Supply, 4-Channel,
Serial 12-Bit ADCs with Internal Reference
______________________________________________________________________________________ 21
MC683XX
(POWER SUPPLIES)
SCK
PCS0
MOSI
MISO
0.1µF
10µF
(GND)
0.01µF
4.7µF
ANALOG
INPUTS
+5V
OR
+3V
+5V
OR
+3V
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
MAX1282
MAX1283
V
DD2
SCLK
CSB
DIN
SSTRB
DOUT
GND
REFADJ
V
DD1
CH0
CH1
COM
CH2
CH3
SHDN
REF
10µF
0.1µF
V
DD1
Figure 16. QSPI Connections
XF
CLKX
CLKR
DX
DR
FSR
CS
SCLK
DIN
DOUT
SSTRB
TMS320LC3x
MAX1282
MAX1283
Figure 17. MAX1282/MAX1283-to-TMS320 Serial Interface

MAX1282BCUE+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog to Digital Converters - ADC 12-Bit 4Ch 400ksps 5.5V Precision ADC
Lifecycle:
New from this manufacturer.
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