MAX1401
+3V, 18-Bit, Low-Power, Multichannel,
Oversampling (Sigma-Delta) ADC
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Reference Input
The MAX1401 is optimized for ratiometric measure-
ments and includes a fully differential reference input.
Apply the reference voltage across REFIN+ and REFIN-,
ensuring that REFIN+ is more positive than REFIN-.
REFIN+ and REFIN- must be between AGND and V+.
The MAX1401 is specified with a +1.25V reference.
Modulator
The MAX1401 performs analog-to-digital conversion
using a single-bit, second-order, switched-capacitor
modulator. A single comparator within the modulator
quantizes the input signal at a much higher sample rate
than the bandwidth of the signal to be converted. The
quantizer then presents a stream of 1s and 0s to the
digital filter for processing, to remove the frequency-
shaped quantization noise.
The MAX1401 modulator provides 2nd-order frequency
shaping of the quantization noise resulting from the
single-bit quantizer. The modulator is fully differential
for maximum signal-to-noise ratio and minimum sus-
ceptibility to power-supply noise.
The modulator operates at one of a total of eight differ-
ent sampling rates (f
M
) determined by the master clock
frequency (f
CLKIN
), the X2CLK bit, the CLK bit, and the
modulator frequency control bits MF1 and MF0. Power
dissipation is optimized for each of these modes by
controlling the bias level of the modulator. Table 15
shows the input and reference sample rates.
PGA
A programmable gain amplifier (PGA) with a user-
selectable gain of x1, x2, x4, x8, x16, x32, x64, or x128
(Table 6) precedes the modulator. Figure 8 shows the
default bipolar transfer function with the following illus-
trated codes: 1) PGA = 0, DAC = 0; 2) PGA = 3, DAC =
0; or 3) PGA = 3, DAC = 3.
Output Noise
Tables 16a and 16b show the rms noise for typical out-
put frequencies (notches) and -3dB frequencies for the
MAX1401 with f
CLKIN
= 2.4576MHz. The numbers
given are for the bipolar input ranges with V
REF
=
+1.25V, with no buffer (BUFF = 0) and with the buffer
inserted (BUFF = 1). These numbers are typical and
are generated at a differential analog input voltage of 0.
Figure 7 shows graphs of Effective Resolution vs. Gain
and Notch Frequency. The effective resolution values
were derived from the following equation:
Effective Resolution = (SNR
dB
- 1.76dB) / 6.02
The maximum possible signal divided by the noise of
the device, SNR
dB
, is defined as the ratio of the input
full-scale voltage (i.e., 2 · V
REFIN
/ GAIN) to the output
rms noise. Note that it is not calculated using peak-to-
peak output noise numbers. Peak-to-peak noise num-
bers can be up to 6.6 times the rms numbers, while
effective resolution numbers based on peak-to-peak
noise can be 2.5 bits below the effective resolution
based on rms noise, as quoted in the tables.
Table 14. R
EXT
, C
EXT
Values for Less than 16-Bit Gain Error in Buffered (BUFF = 1)
Mode; All Modulator Sampling Frequencies (MF1, MF0 = XX); X2CLK = 0; f
CLKIN
=
2.4576MHz
10 10
10 10 102
10 10 10
10
4
1
C
EXT
= 0pF C
EXT
= 50pF C
EXT
= 100pF
10 10
10 10 10
10 10 10
PGA GAIN
10
C
EXT
= 500pF C
EXT
= 1000pF C
EXT
= 5000pF
EXTERNAL RESISTANCE, R
EXT
(kΩ)
10 10
10 10 1016
10 10 10
10
32
8 10 10
10 10 10
10 10 10
10
10 10 1064
10 10 10128
10 10 10
10 10 10
