Rev D 6/9/15 10 FEMTOCLOCKS CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER
844002I-01 DATA SHEET
Power Considerations
This section provides information on power dissipation and junction temperature for the 844002I-01.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS44002I-01 is the sum of the core power plus the analog power plus the power dissipated in the load(s).
The following is the power dissipation for V
DD
= 2.5V + 5% = 2.625V, which gives worst case results.
Power (core)
MAX
= V
DD_MAX
* (I
DD_MAX
+ I
DDA_MAX
) = 2.625V * (98mA + 12mA) = 288.75mW
Power (outputs)
MAX
= V
DDO_MAX
* I
DDO_MAX
= 2.625V * 98mA = 257.25mW
Total Power_
MAX
= 288.75mW + 257.25mW = 546mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The
maximum recommended junction temperature for HiPerClockS devices is 125°C.
The equation for Tj is as follows: Tj =
JA
* Pd_total + T
A
Tj = Junction Temperature
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
JA
must be used. Assuming a moderate air
flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 66.6°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.546W * 66.6°C/W = 121.4°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (single layer or multi-layer).
Table 6. Thermal Resistance
JA
for 20 Lead TSSOP, Forced Convection
JA
by Velocity
Linear Feet per Minute 0200500
Single-Layer PCB, JEDEC Standard Test Boards 114.5°C/W 98.0°C/W 88.0°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 73.2°C/W 66.6°C/W 63.5°C/W
FEMTOCLOCKS CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER 11 Rev D 6/9/15
844002I-01 DATA SHEET
Reliability Information
Table 7.
JA
vs. Air Flow Table for a 20 Lead TSSOP
Transistor Count
The transistor count for 844002I-01 is: 2914
Package Outline and Package Dimensions
Package Outline - G Suffix for 20 Lead TSSOP
Table 8. Package Dimensions
Reference Document: JEDEC Publication 95, MO-153
JA
by Velocity
Linear Feet per Minute 0200500
Single-Layer PCB, JEDEC Standard Test Boards 114.5°C/W 98.0°C/W 88.0°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 73.2°C/W 66.6°C/W 63.5°C/W
All Dimensions in Millimeters
Symbol Minimum Maximum
N 20
A 1.20
A1 0.05 0.15
A2 0.80 1.05
b 0.19 0.30
c 0.09 0.20
D 6.40 6.60
E 6.40 Basic
E1 4.30 4.50
e 0.65 Basic
L 0.45 0.75
aaa 0.10
All Dimensions in Millimeters
Symbol Minimum Maximum
Rev D 6/9/15 12 FEMTOCLOCKS CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER
844002I-01 DATA SHEET
Ordering Information
Table 9. Ordering Information
NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
Part/Order Number Marking Package Shipping Packaging Temperature
844002AGI-01LF ICS4002AI01L “Lead-Free” 20 Lead TSSOP Tube -40C to 85C
844002AGI-01LFT ICS4002AI01L “Lead-Free” 20 Lead TSSOP Tape & Reel -40C to 85C

844002AGI-01LF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner FemtoClock LVDS Synthesizer
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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