XC95288XV-10CS280C

XC95288XV High-Performance CPLD
DS050 (v3.0) June 25, 2007 www.xilinx.com 13
Product Specification
R
Device Part Marking and Ordering Combination Information
Device Ordering and
Part Marking Number
Speed
(pin-to-pin
delay)
Pkg.
Symbol
No. of
Pins Package Type
Operating
Range
(1)
XC95288XV-6TQ144C 6 ns TQ144 144-pin Thin Quad Flat Pack C
XC95288XV-6PQ208C 6 ns PQ208 208-pin Plastic Quad Flat Package C
XC95288XV-6FG256C 6 ns FG256 256-ball Plastic Fineline Ball Grid Array C
XC95288XV-6CS280C 6 ns CS280 280-ball Chipscale Package C
XC95288XV-7TQ144C 7.5 ns TQ144 144-pin Thin Quad Flat Pack C
XC95288XV-7PQ208C 7.5 ns PQ208 208-pin Plastic Quad Flat Package C
XC95288XV-7FG256C 7.5 ns FG256 256-ball Plastic Fineline Ball Grid Array C
XC95288XV-7CS280C 7.5 ns CS280 280-pin Chipscale Package C
XC95288XV-7TQ144I 7.5 ns TQ144 144-pin Thin Quad Flat Pack I
XC95288XV-7PQ208I 7.5 ns PQ208 208-pin Plastic Quad Flat Package I
XC95288XV-7FG256I 7.5 ns FG256 256-ball Plastic Fineline Ball Grid Array I
XC95288XV-7CS280I 7.5 ns CS280 280-pin Chipscale Package I
XC95288XV-10TQ144C 10 ns TQ144 144-pin Thin Quad Flat Pack C
XC95288XV-10PQ208C 10 ns PQ208 208-pin Plastic Quad Flat Package C
XC95288XV-10FG256C 10 ns FG256 256-ball Plastic Fineline Ball Grid Array C
XC95288XV-10CS280C 10 ns CS280 280-ball Chipscale Package C
XC95288XV-10TQ144I 10 ns TQ144 144-pin Thin Quad Flat Pack I
XC95288XV-10PQ208I 10 ns PQ208 208-pin Plastic Quad Flat Package I
XC95288XV-10FG256I 10 ns FG256 256-ball Plastic Fineline Ball Grid Array I
XC95288XV-10CS280I 10 ns CS280 280-ball Chipscale Package I
Notes:
1. C = Commercial: T
A
= 0° to +70°C; I = Industrial: T
A
= –40° to +85°C
2. Some packages available in Pb-free option. See Xilinx Packaging
for more information.
XC95xxxXV
TQ144
7C
Device Type
Package
Speed
Operating Range
This line not
related to device
part number
Sample package with part marking.
R
1
Product Obsolete/Under Obsolescence
XC95288XV High-Performance CPLD
14 www.xilinx.com DS050 (v3.0) June 25, 2007
Product Specification
R
Revision History
Date Version Revision
09/28/98 1.0 Original creation of data sheet.
12/10/98 1.1 Revision of tables.
2/5/99 1.2 Updated pinouts to reflect BG256 (replaces BG352).
6/7/99 1.3 Add -7 speed and CS280 package.
4/11/00 1.4 Updated AC specifications, added bank information to pinout tables.
01/29/01 2.0 Added -5 performance specification, deleted -6; changed BG256 package to FG256 package.
Updated I
CC
vs. Frequency Figure 1.
05/15/01 2.1 Updated I
CC
formula, Recommended Operation Conditions, -5 AC Characteristics and Internal
Timing Parameters
08/27/01 2.2 Changed V
CCIO
3.3V from 3.13 to 3.0 (min), 3.46 to 3.60 (max); DC characteristics: I
IL
- added
"low" current, I
IH
- changed to "Input leakage high current"; Internal Timing: -5 T
AOI
from 6.5 to 5.9.
06/24/02 2.3 Updated I
CC
equation on page 1. Updated Figure 3: AC Load Circuit 1.8V parameters. Added
second test condition and max measurement to I
IH
DC Characteristics. Added Part Marking
Information to Ordering Information. Changed to Preliminary. Changed -5 speed to -6 speed;
added -7 Industrial.
05/27/03 2.4 Updated T
SOL
from 260 to 220
o
C. Updated Device Part Marking.
08/21/03 2.5 Updated Package Device Marking Pin 1 orientation.
04/15/05 2.6 Added T
APRPW
specification to AC Characteristics. Added IOSTANDARD information.
06/25/07 3.0 Notice of discontinuance.
Product Obsolete/Under Obsolescence

XC95288XV-10CS280C

Mfr. #:
Manufacturer:
Xilinx
Description:
Field-Programmable Gate Array
Lifecycle:
New from this manufacturer.
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