XC95288XV-10CS280C

XC95288XV High-Performance CPLD
DS050 (v3.0) June 25, 2007 www.xilinx.com 7
Product Specification
R
Internal Timing Parameters
Figure 3: AC Load Circuit
Symbol Parameter
XC95288XV-6 XC95288XV-7 XC95288XV-10
UnitsMin Max Min Max Min Max
Buffer Delays
T
IN
Input buffer delay - 2.2 - 2.3 - 3.5 ns
T
GCK
GCK buffer delay - 1.2 - 1.5 - 1.8 ns
T
GSR
GSR buffer delay - 2.2 - 3.1 - 4.5 ns
T
GTS
GTS buffer delay - 4.5 - 5.0 - 7.0 ns
T
OUT
Output buffer delay - 2.4 - 2.5 - 3.0 ns
T
EN
Output buffer enable/disable delay - 0 - 0 - 0 ns
Product Term Control Delays
T
PTCK
Product term clock delay - 2.0 - 2.4 - 2.7 ns
T
PTSR
Product term set/reset delay - 1.0 - 1.4 - 1.8 ns
T
PTTS
Product term 3-state delay - 6.2 - 7.2 - 7.5 ns
Internal Register and Combinatorial Delays
T
PDI
Combinatorial logic propagation delay - 0.4 - 1.3 - 1.7 ns
T
SUI
Register setup time 2.0 - 2.6 - 3.0 - ns
T
HI
Register hold time 1.6 - 2.2 - 3.5 - ns
T
ECSU
Register clock enable setup time 2.0 - 2.6 - 3.0 - ns
T
ECHO
Register clock enable hold time 1.6 - 2.2 - 3.5 - ns
T
COI
Register clock to output valid time - 0.2 - 0.5 - 1.0 ns
T
AOI
Register async. S/R to output delay - 6.2 - 6.4 - 7.0 ns
T
RAI
Register async. S/R recover before clock 6.0 - 7.5 10.0 - ns
T
LOGI
Internal logic delay - 1.0 - 1.4 - 1.8 ns
T
LOGILP
Internal low power logic delay - 5.5 - 6.4 - 7.3 ns
Feedback Delays
T
F
Fast CONNECT II feedback delay - 1.6 - 3.5 - 4.2 ns
Time Adders
T
PTA
Incremental product term allocator delay - 0.8 - 0.8 - 1.0 ns
T
PTA2
Adjacent macrocell p-term allocator delay - 0.3 - 0.3 - 0.4 ns
T
SLEW
Slew-rate limited delay - 3.5 - 4.0 - 4.5 ns
R
1
V
TEST
C
L
R
2
Device Output
Output Type V
TEST
3.3V
2.5V
1.8V
R
1
320Ω
250Ω
10KΩ
R
2
360Ω
660Ω
14KΩ
C
L
35 pF
35 pF
35 pF
DS050_03_110101
V
CCIO
3.3V
2.5V
1.8V
Product Obsolete/Under Obsolescence
XC95288XV High-Performance CPLD
8 www.xilinx.com DS050 (v3.0) June 25, 2007
Product Specification
R
XC95288XV I/O Pins
Function
Block
Macro-
cell
TQ144 PQ208 FG256 CS280
BScan
Order Bank
Function
Block
Macro-
cell
TQ144 PQ208 FG256 CS280
BScan
Order Bank
1 1 - ---861- 3 1 - ---753-
1 2 - 28 H1 K2 858 1 3 2 28 38 L2 N2 750 1
1 3 - 29 H5 K3 855 1 3 3 - 39 L5 P1 747 1
1 4 - - - -852- 3 4 - - - - 744 -
1 5 20 30 J1 K4 849 1 3 5 - 40 M1 P2 741 1
1 6 21 31 J5 L1 846 1 3 6 - 41 L4 P3 738 1
1 7 - - - -843- 3 7 - - - - 735 -
1 8 22 32 J2 L2 840 1 3 8 - 43 N1 P4 732 1
1 9 - -J3L38371 3 9 - - L3 R1 729 1
1 10 23 33 K1 L4 834 1 3 10 30
(1)
44
(1)
M2
(1)
R3
(1)
726 1
1 11 - -J4M18311 3 11 - - M4 R2 723 1
1 12 24 34 K2 M2 828 1 3 12 31 45 P1 R4 720 1
1 13 - - - -825- 3 13 - - - - 717 -
1 14 25 35 K5 M3 822 1 3 14 32
(1)
46
(1)
M3
(1)
T1
(1)
714 1
1 15 26 36 L1 M4 819 1 3 15 33 47 N2 T2 711 1
1 16 - - - -816- 3 16 - ---708-
1 17 27 37 K3 N1 813 1 3 17 - 48 N4 T3 705 1
118----810-
318----702-
2 1 - ---807- 4 1 - ---699-
2 2 9 15 D1 G3 804 2 4 2 2
(1)
3
(1)
D3
(1)
C2
(1)
696 2
2 3 10 16 G4 G2 801 2 4 3 - 4 D2 B1 693 2
2 4 - - - -798- 4 4 - - - - 690 -
2 5 11 17 E1 G1 795 2 4 5 3
(1)
5
(1)
E3
(1)
C1
(1)
687 2
2 6 12 18 G3 G4 792 2 4 6 4 6 C2 D4 684 2
2 7 - - - -789- 4 7 - - - - 681 -
2 8 13 19 G2 H1 786 2 4 8 5
(1)
7
(1)
D4
(1)
D3
(1)
678 2
2 9 - -F5H37832 4 9 - - B1 D2 675 2
2 10 14 20 F1 H2 780 2 4 10 - 8 E4 D1 672 2
2 11 - -G5H47772 4 11 - - C1 E3 669 2
2 12 15 21 H2 J1 774 2 4 12 6
(1)
9
(1)
E5
(1)
E2
(1)
666 2
2 13 - - - -771- 4 13 - - - - 663 -
2 14 16 22 H4 J2 768 2 4 14 7 10 E2 E4 660 2
2 15 17 23 G1 J3 765 2 4 15 - 12 F2 F3 657 2
2 16 - - - -762- 4 16 - - - - 654 -
2 17 19 25 H3 J4 759 2 4 17 - 14 E6 F4 651 2
218
- - - -756- 418- - - - 648 -
Notes:
1. Global control pin
Product Obsolete/Under Obsolescence
XC95288XV High-Performance CPLD
DS050 (v3.0) June 25, 2007 www.xilinx.com 9
Product Specification
R
XC95288XV I/O Pins (continued)
Function
Block
Macro-
cell
TQ144 PQ208 FG256 CS280
BScan
Order Bank
Function
Block
Macro-
cell
TQ144 PQ208 FG256 CS280
BScan
Order Bank
5 1 - - - - 645 - 7 1 - ---537-
5 2 34 49 R1 U1 642 1 7 2 - 62 R3 W5 534 1
5 3 - 50 N3 V1 639 1 7 3 45 63 M6 U6 531 1
5 4 - - - - 636 - 7 4 - - - -528-
5 5 35 51 P2 U2 633 1 7 5 46 64 T3 V6 525 1
5 6 - 54 P4 V3 630 1 7 6 - 66 T4 W6 522 1
5 7 - - - - 627 - 7 7 - - - -519-
5 8 38
(1)
55
(1)
P5
(1)
W2
(1)
624 1 7 8 - 67 P7 U7 516 1
5 9 - - T2 W3 621 1 7 9 - -T5V75131
5 10 39 56 N5 T4 618 1 7 10 - 69 N7 W7 510 1
5 11 - - R4U4615 1 7 11 - -R7T75071
5 12 40 57 M5 V4 612 1 7 12 48 70 M7 W8 504 1
5 13 - - - - 609 - 7 13 - - - -501-
5 14 41 58 R5 W4 606 1 7 14 - 71 T6 U8 498 1
5 15 43 60 R6 V5 603 1 7 15 49 72 N8 V8 495 1
5 16 - - - - 600 - 7 16 - - - -492-
5 17 44 61 N6 T5 597 1 7 17 - 73 T7 T8 489 1
5 18 - - - - 594 -
718----486-
6 1 - - - - 591 - 8 1 - ---483-
6 2 135 197 A5 D7 588 2 8 2 130 186 E11 B10 480 2
6 3 136 198 D6 A6 585 2 8 3 131 187 A8 C10 477 2
6 4 - - - - 582 - 8 4 - - - -474-
6 5 137 199 B5 B6 579 2 8 5 132 188 C8 D10 471 2
6 6 138 200 C6 C6 576 2 8 6 - 189 B8 A9 468 2
6 7 - - - - 573 - 8 7 - - - -465-
6 8 139 201 A4 D6 570 2 8 8 133 191 D8 B9 462 2
6 9 - - E7 A5 567 2 8 9 - -A7C94592
6 10 140 202 A3 C5 564 2 8 10 134 192 E9 D9 456 2
6 11 - - C5 B5 561 2 8 11 - -B7A84532
6 12 - 203 A2 D5 558 2 8 12 - 193 D7 B8 450 2
6 13 - - - - 555 - 8 13 - - - -447-
6 14 142 205 B4 B4 552 2 8 14 - 194 A6 C8 444 2
6 15 143
(1)
206
(1)
C4
(1)
C4
(1)
549 2 8 15 - 195 B6 B7 441 2
6 16 - - - - 546 - 8 16 - - - -438-
6 17 - 208 B3 A3 543 2 8 17 - 196 E8 C7 435 2
618
- - - - 540 - 818- - - -432-
Notes:
1. Global control pin
Product Obsolete/Under Obsolescence

XC95288XV-10CS280C

Mfr. #:
Manufacturer:
Xilinx
Description:
Field-Programmable Gate Array
Lifecycle:
New from this manufacturer.
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