MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
10 ______________________________________________________________________________________
Table 1. MAX7313 I
2
C Slave Address Map (continued)
DEVICE ADDRESS
PIN AD2 PIN AD1 PIN AD0
A6 A5 A4 A3 A2 A1 A0
SCL SCL GND1010000
SCL SCL V+ 1010001
SCL SDA GND1010010
SCL SDA V+ 1010011
SDA SCL GND1010100
SDA SCL V+ 1010101
SDA SDA GND1010110
SDA SDA V+ 1010111
SCL SCL SCL 1011000
SCL SCL SDA1011001
SCL SDA SCL 1011010
SCL SDA SDA1011011
SDA SCL SCL 1011100
SDA SCL SDA1011101
SDA SDA SCL 1011110
SDA SDA SDA1011111
SCL GNDGND1100000
SCL GND V+ 1100001
SCL V+ GND1100010
SCL V+ V+ 1100011
SDAGNDGND1100100
SDAGND V+ 1100101
SDA V+ GND1100110
SDA V+ V+ 1100111
SCL GND SCL 1101000
SCL GNDSDA1101001
SCL V+ SCL 1101010
SCL V+ SDA1101011
SDAGND SCL 1101100
SDAGNDSDA1101101
SDA V+ SCL 1101110
SDA V+ SDA1101111
Any bytes received after the command byte are data
bytes. The first data byte goes into the internal register
of the MAX7313 selected by the command byte (Figure
8). If multiple data bytes are transmitted before a STOP
condition is detected, these bytes are generally stored
in subsequent MAX7313 internal registers because the
command byte address autoincrements (Table 2). A
diagram of a write to the output ports registers (blink
phase 0 registers or blink phase 1 registers) is given in
Figure 10.
Message Format for Reading
The MAX7313 is read using the MAX7313’s internally
stored command byte as an address pointer the same
way the stored command byte is used as an address
pointer for a write. The pointer autoincrements after
each data byte is read using the same rules as for a
write (Table 2). Thus, a read is initiated by first configur-
ing the MAX7313’s command byte by performing a
write (Figure 7). The master can now read n consecu-
tive bytes from the MAX7313 with the first data byte
being read from the register addressed by the initial-
ized command byte. When performing read-after-write
verification, remember to reset the command byte’s
address because the stored command byte address
has been autoincremented after the write (Table 2). A
diagram of a read from the input ports registers is
shown in Figure 10 reflecting the states of the ports.
Operation with Multiple Masters
If the MAX7313 is operated on a 2-wire interface with
multiple masters, a master reading the MAX7313 should
use a repeated start between the write, which sets the
MAX7313’s address pointer, and the read(s) that takes
the data from the location(s) (Table 2). This is because it
is possible for master 2 to take over the bus after master
1 has set up the MAX7313’s address pointer but before
master 1 has read the data. If master 2 subsequently
changes the MAX7313’s address pointer, then master
1’s delayed read can be from an unexpected location.
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
______________________________________________________________________________________ 11
Figure 8. Command and Single Data Byte Received
SAAAP0SLAVE ADDRESS COMMAND BYTE DATA BYTE
1
BYTE
AUTOINCREMENT MEMORY ADDRESS
D15 D14 D13 D12 D11 D10 D9 D8 D1 D0D3 D2D5 D4D7 D6
ACKNOWLEDGE FROM MAX7313 ACKNOWLEDGE FROM MAX7313
ACKNOWLEDGE FROM MAX7313
HOW COMMAND BYTE AND DATA BYTE MAP INTO
MAX7313'S REGISTERS
R/W
Figure 9. n Data Bytes Received
SAAAP0SLAVE ADDRESS COMMAND BYTE DATA BYTE
N
BYTES
AUTOINCREMENT MEMORY ADDRESS
D15 D14 D13 D12 D11 D10 D9 D8 D1 D0D3 D2D5 D4D7 D6
ACKNOWLEDGE FROM MAX7313 ACKNOWLEDGE FROM MAX7313
ACKNOWLEDGE FROM MAX7313
HOW COMMAND BYTE AND DATA BYTE MAP INTO
MAX7313'S REGISTERS
R/W
Figure 7. Command Byte Received
SAA
P
0SLAVE ADDRESS COMMAND BYTE
ACKNOWLEDGE FROM MAX7313
D15 D14 D13 D12 D11 D10 D9 D8
COMMAND BYTE IS STORED ON RECEIPT OF
STOP CONDITION
ACKNOWLEDGE FROM MAX7313
R/W
MAX7313
Command Address Autoincrementing
The command address stored in the MAX7313 circu-
lates around grouped register functions after each data
byte is written or read (Table 2).
Device Reset
If a device reset input is needed, consider the
MAX7314. The MAX7314 includes a RST input, which
clears any transaction to or from the MAX7314 on the
serial interface and configures the internal registers to
the same state as a power-up reset.
Detailed Description
Initial Power-Up
On power-up all control registers are reset and the
MAX7313 enters standby mode (Table 3). Power-up
status makes all ports into inputs and disables both the
PWM oscillator and blink functionality.
Configuration Register
The configuration register is used to configure the PWM
intensity mode, interrupt, and blink behavior, operate
the INT/O16 output, and read back the interrupt status
(Table 4).
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
12 ______________________________________________________________________________________
Figure 10. Read, Write, and Interrupt Timing Diagrams
SLAVE ADDRESS
123456789
SA6A5A4A3A2A1A00A0 000000
COMMAND BYTE
1A A AP
START CONDITION
ACKNOWLEDGE FROM SLAVE
ACKNOWLEDGE FROM SLAVE ACKNOWLEDGE FROM SLAVE STOP
CONDITION
P7–P0
P15– P8
DATA1 VALID
DATA2 VALID
SLAVE ADDRESS
123456789
S A6A5A4A3A2A1A0 1 A
COMMAND BYTE
ANA
START CONDITION
ACKNOWLEDGE FROM SLAVE
ACKNOWLEDGE FROM MASTER
P7–P0
P15–P8
STOP CONDITION
P
NO ACKNOWLEDGE FROM
MASTER
DATA2
DATA4DATA3
t
DV
t
DV
SLAVE ADDRESS
123456789
SA6A5A4A3A2A1A0 1 A
COMMAND BYTE
ANA
START CONDITION
ACKNOWLEDGE FROM SLAVE
ACKNOWLEDGE FROM MASTER
P7–P0
P15–P8
STOP CONDITION
P
NO ACKNOWLEDGE FROM
MASTER
DATA1 DATA2 DATA3 DATA4
DATA6DATA5
t
DH
t
DS
DATA1
t
IV
t
IR
t
IR
t
IV
SCL
SDA
SCL
SDA
SCL
SDA
WRITE TO OUTPUT PORTS REGISTERS (BLINK PHASE 0 REGISTERS/BLINK PHASE 1 REGISTERS)
READ FROM INPUT PORTS REGISTERS
INTERRUPT VALID/RESET
R/W
MSB LSBDATA1
MSB LSBDATA1
MSB LSBDATA2 MSB LSBDATA4
MSB LSBDATA6
MSB LSBDATA2
R/W
R/W
INT

MAX7313ATG+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Interface - I/O Expanders 16-Bit I/O Port Expander
Lifecycle:
New from this manufacturer.
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