Ports Configuration
The 16 I/O ports P0 through P15 can be configured to
any combination of inputs and outputs using the ports
configuration registers (Table 5). The INT/O16 output
can also be configured as an extra general-purpose
output using the configuration register (Table 4).
Input Ports
The input ports registers are read only (Table 6). They
reflect the incoming logic levels of the ports, regardless
of whether the port is defined as an input or an output
by the ports configuration registers. Reading an input
ports register latches the current-input logic level of the
affected eight ports. A write to an input ports register is
ignored.
Transition Detection
All ports configured as inputs are always monitored for
changes in their logic status. The action of reading an
input ports register or writing to the configuration regis-
ter samples the corresponding 8 port bits’ input condi-
tion (Tables 4, 6). This sample is continuously
compared with the actual input conditions. A detected
change in input condition causes an interrupt condition.
The interrupt is cleared either automatically if the
changed input returns to its original state, or when the
appropriate input ports register is read, updating the
compared data (Figure 10). Randomly changing a port
from an output to an input may cause a false interrupt
to occur if the state of the input does not match the
content of the appropriate input ports register. The
interrupt status is available as the interrupt flag INT in
the configuration register (Table 4).
The input status of all ports are sampled immediately
after power-up as part of the MAX7313’s internal initial-
ization, so if all the ports are pulled to valid logic levels
at that time an interrupt does not occur at power-up.
INT/O16 Output
The INT/O16 output pin can be configured as either the
INT output that reflects the interrupt flag logic state or
as a general-purpose output O16. When used as a
general-purpose output, the INT/O16 pin has the same
blink and PWM intensity control capabilities as the
other ports.
Set the interrupt enable I bit in the configuration register
to configure INT/O16 as the INT output (Table 4). Clear
interrupt enable to configure INT/O16 as the O16. O16
logic state is set by the 2 bits O1 and O0 in the configu-
ration register. O16 follows the rules for blinking select-
ed by the blink enable flag E in the configuration
register. If blinking is disabled, then interrupt output
control O0 alone sets the logic state of the INT/O16 pin.
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
______________________________________________________________________________________ 13
Table 2. Register Address Map
REGISTER
ADDRESS CODE
(HEX)
AUTOINCREMENT
ADDRESS
Read input ports P7–P0 0x00 0x01
Read input ports P15–P8 0x01 0x00
Blink phase 0 outputs P7–P0 0x02 0x03
Blink phase 0 outputs P15–P8 0x03 0x02
Ports configuration P7–P0 0x06 0x07
Ports configuration P15–P8 0x07 0x06
Blink phase 1 outputs P7–P0 0x0A 0x0B
Blink phase 1 outputs P15–P8 0x0B 0x0A
Master, O16 intensity 0x0E 0x0E (no change)
Configuration 0x0F 0x0F (no change)
Outputs intensity P1, P0 0x10 0x11
Outputs intensity P3, P2 0x11 0x12
Outputs intensity P5, P4 0x12 0x13
Outputs intensity P7, P6 0x13 0x14
Outputs intensity P9, P8 0x14 0x15
Outputs intensity P11, P10 0x15 0x16
Outputs intensity P13, P12 0x16 0x17
Outputs intensity P15, P14 0x17 0x10
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
14 ______________________________________________________________________________________
Table 3. Power-Up Configuration
REGISTER DATA
REGISTER FUNCTION POWER-UP CONDITION
ADDRESS
CODE
(HEX)
D7 D6 D5 D4 D3 D2 D1 D0
Blink phase 0 outputs P7–P0 High-impedance outputs 0x02 1 1 1 1 1 1 1 1
Blink phase 0 outputs P15–P8 High-impedance outputs 0x03 1 1 1 1 1 1 1 1
Ports configuration P7–P0 Ports P7–P0 are inputs 0x06 1 1 1 1 1 1 1 1
Ports configuration P15–P8 Ports P15–P8 are inputs 0x07 1 1 1 1 1 1 1 1
Blink phase 1 outputs P7–P0 High-impedance outputs 0x0A 1 1 1 1 1 1 1 1
Blink phase 1 outputs P15–P8 High-impedance outputs 0x0B 1 1 1 1 1 1 1 1
Master, O16 intensity
PWM oscillator is disabled;
O16 is static logic output
0x0E 0 0 0 0 1 1 1 1
Configuration
INT/O16 is interrupt output;
blink is disabled;
global intensity is enabled
0x0F 0 0 0 0 1 1 0 0
Outputs intensity P1, P0 P1, P0 are static logic outputs 0x10 1 1 1 1 1 1 1 1
Outputs Intensity P3, P2 P3, P2 are static logic outputs 0x11 1 1 1 1 1 1 1 1
Outputs intensity P5, P4 P5, P4 are static logic outputs 0x12 1 1 1 1 1 1 1 1
Outputs intensity P7, P6 P7, P6 are static logic outputs 0x13 1 1 1 1 1 1 1 1
Outputs intensity P9, P8 P9, P8 are static logic outputs 0x14 1 1 1 1 1 1 1 1
Outputs intensity P11, P10 P11, P10 are static logic outputs 0x15 1 1 1 1 1 1 1 1
Outputs intensity P13, P12 P13, P12 are static logic outputs 0x16 1 1 1 1 1 1 1 1
Outputs intensity P15, P14 P15, P14 are static logic outputs 0x17 1 1 1 1 1 1 1 1
Table 4. Configuration Register
REGISTER DATA
REGISTER
ADDRESS
CODE
(HEX)
D7 D6 D5 D4 D3 D2 D1 D0
CONFIGURATION
R/W
INTERRUPT
STATUS
INTERRUPT
OUTPUT
CONTROL
AS GPO
INTERRUPT
ENABLE
GLOBAL
INTENSITY
BLINK FLIP
BLINK
ENABLE
Write device configuration
0
X
Read back device configuration
1
INT
O
O1
O0 I G B E
Disable blink
XXXXXXX0
Enable blink
XXXXXXX1
XXXXXX01
Flip blink register (see text)
0x0F
XXXXXX11
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
______________________________________________________________________________________ 15
Table 4. Configuration Register (continued)
REGISTER DATA
REGISTER
ADDRESS
CODE
(HEX)
D7 D6 D5 D4 D3 D2 D1 D0
CONFIGURATION
R/W
INTERRUPT
STATUS
INTERRUPT
OUTPUT
CONTROL
AS GPO
INTERRUPT
ENABLE
GLOBAL
INTENSITY
BLINK FLIP
BLINK
ENABLE
Write device configuration
0
X
Read back device configuration
1
INT
O
O1
O0 I G B E
Disable global intensity control—intensity
is set by registers 0x10–0x17 for ports P0
through P15 when configured as outputs,
and by D3–D0 of register 0x0E for
INT/O16 when INT/O16 pin is configured
as an output port
XXXXX0 XX
Enable global intensity control—intensity
for all ports configured as outputs is set
by D3–D0 of register 0x0E
XXXXX1 XX
Disable data change interrupt—INT/O16
output is controlled by the O0 and O1 bits
XXXX0 XXX
Enable data change interrupt—INT/O16
output is controlled by port input data
change
XXXX1 XXX
INT/O16 output is low (blink is disabled)
XXX00XX0
INT/O16 output is high impedance (blink
is disabled)
XXX10XX0
IN T/O16 outp ut i s l ow d ur i ng b l i nk p hase 0
XXX00XX1
INT/O16 output is high impedance during
blink phase 0
XXX10XX1
IN T/O16 outp ut i s l ow d ur i ng b l i nk p hase 1
XX0 X 0 XX1
INT/O16 output is high impedance during
blink phase 1
XX1 X 0 XX1
Read-back data change interrupt status
—data change is not detected, and
INT/O16 output is high when interrupt
enable (I bit) is set
1
00XXXXXX
Read-back data change interrupt status
—data change is detected, and INT/O16
output is low when interrupt enable (I bit)
is set
1
0x0F
10XXXXXX
X
= Don’t care.

MAX7313ATG+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Interface - I/O Expanders 16-Bit I/O Port Expander
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