as an input or an output. Reading an input ports regis-
ter latches the current-input logic level of the affected
eight ports. Transition detection allows all ports config-
ured as inputs to be monitored for changes in their
logic status. The action of reading an input ports regis-
ter samples the corresponding 8 port bits’ input condi-
tions. This sample is continuously compared with the
actual input conditions. A detected change in input
condition causes the INT/O16 interrupt output to go
low, if configured as an interrupt output. The interrupt is
cleared either automatically if the changed input
returns to its original state, or when the appropriate
input ports register is read.
The INT/O16 pin can be configured as either an inter-
rupt output or as a 17th output port with the same static
or blink controls as the other 16 ports (Table 4).
Port Output Control and LED Blinking
The two blink phase 0 registers set the output logic lev-
els of the 16 ports P0–P15 (Table 8). These registers
control the port outputs if the blink function is disabled.
A duplicate pair of registers, the blink phase 1 regis-
ters, are also used if the blink function is enabled
(Table 9). In blink mode, the port outputs can be
flipped between using the blink phase 0 registers and
the blink phase 1 registers using software control (the
blink flip flag in the configuration register) (Table 4).
PWM Intensity Control
The MAX7313 includes an internal oscillator, nominally
32kHz, to generate PWM timing for LED intensity con-
trol. PWM intensity control can be enabled on an out-
put-by-output basis, allowing the MAX7313 to provide
any mix of PWM LED drives and glitch-free logic out-
puts (Table 10). PWM can be disabled entirely, in
which case all output ports are static and the MAX7313
operating current is lowest because the internal oscilla-
tor is turned off.
PWM intensity control uses a 4-bit master control and 4
bits of individual control per output (Tables 13, 14). The
4-bit master control provides 16 levels of overall intensi-
ty control, which applies to all PWM-enabled output
ports. The master control sets the maximum pulse
width from 1/15 to 15/15 of the PWM time period. The
individual settings comprise a 4-bit number further
reducing the duty cycle to be from 1/16 to 15/16 of the
time window set by the master control.
For applications requiring the same PWM setting for all
output ports, a single global PWM control can be used
instead of all the individual controls to simplify the con-
trol software and provide 240 steps of intensity control
(Tables 10 and 13).
Standby Mode
When the serial interface is idle and the PWM intensity
control is unused, the MAX7313 automatically enters
standby mode. If the PWM intensity control is used, the
operating current is slightly higher because the internal
PWM oscillator is running. When the serial interface is
active, the operating current also increases because
the MAX7313, like all I
2
C slaves, has to monitor every
transmission.
Serial Interface
Serial Addressing
The MAX7313 operates as a slave that sends and
receives data through an I
2
C-compatible 2-wire inter-
face. The interface uses a serial data line (SDA) and a
serial clock line (SCL) to achieve bidirectional commu-
nication between master(s) and slave(s). A master (typ-
ically a microcontroller) initiates all data transfers to and
from the MAX7313 and generates the SCL clock that
synchronizes the data transfer (Figure 2).
The MAX7313 SDA line operates as both an input and
an open-drain output. A pullup resistor, typically 4.7k,
is required on SDA. The MAX7313 SCL line operates
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
_______________________________________________________________________________________ 7
Figure 2. 2-Wire Serial Interface Timing Details
SCL
SDA
t
R
t
F
t
BUF
START
CONDITION
STOP
CONDITION
REPEATED START CONDITION
START CONDITION
t
SU,STO
t
HD,STA
t
SU,STA
t
HD,DAT
t
SU,DAT
t
LOW
t
HIGH
t
HD,STA
MAX7313
only as an input. A pullup resistor, typically 4.7k, is
required on SCL if there are multiple masters on the 2-
wire interface, or if the master in a single-master system
has an open-drain SCL output.
Each transmission consists of a START condition
(Figure 3) sent by a master, followed by the MAX7313
7-bit slave address plus R/W bit, a register address
byte, one or more data bytes, and finally a STOP condi-
tion (Figure 3).
START and STOP Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 3).
Bit Transfer
One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 4).
Acknowledge
The acknowledge bit is a clocked 9th bit that the recipi-
ent uses to handshake receipt of each byte of data
(Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse so the SDA line is stable low
during the high period of the clock pulse. When the
master is transmitting to the MAX7313, the device gen-
erates the acknowledge bit because the MAX7313 is
the recipient. When the MAX7313 is transmitting to the
master, the master generates the acknowledge bit
because the master is the recipient.
Slave Address
The MAX7313 has a 7-bit long slave address (Figure 6).
The eighth bit following the 7-bit slave address is the
R/W bit. The R/W bit is low for a write command, high
for a read command.
The slave address bits A6 through A0 are selected by
the address inputs AD0, AD1, and AD2. These pins can
be connected to GND, V+, SDA, or SCL. The MAX7313
has 64 possible slave addresses (Table 1) and, there-
fore, a maximum of 64 MAX7313 devices can be con-
trolled independently from the same interface.
Message Format for Writing the MAX7313
A write to the MAX7313 comprises the transmission of
the MAX7313’s slave address with the R/W bit set to
zero, followed by at least 1 byte of information. The first
byte of information is the command byte. The command
byte determines which register of the MAX7313 is to be
written to by the next byte, if received (Table 2). If a
STOP condition is detected after the command byte is
received, then the MAX7313 takes no further action
beyond storing the command byte.
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
8 _______________________________________________________________________________________
Figure 3. START and STOP Conditions
SDA
SCL
START
CONDITION
STOP
CONDITION
SP
Figure 4. Bit Transfer
SDA
SCL
DATA LINE STABLE;
DATA VALID
CHANGE OF DATA
ALLOWED
Figure 5. Acknowledge
SCL
SDA BY
TRANSMITTER
CLOCK PULSE
FOR ACKNOWLEDGE
START
CONDITION
SDA BY
RECEIVER
12 89
S
Figure 6. Slave Address
SDA
SCL
A5
MSB
LSB
ACKA4 A1A6 A3 A0A2 R/W
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
_______________________________________________________________________________________ 9
Table 1. MAX7313 I
2
C Slave Address Map
DEVICE ADDRESS
PIN AD2 PIN AD1 PIN AD0
A6 A5 A4 A3 A2 A1 A0
GND SCL GND0010000
GND SCL V+ 0010001
GNDSDAGND0010010
GNDSDA V+ 0010011
V+ SCL GND0010100
V+ SCL V+ 0010101
V+ SDAGND0010110
V+ SDA V+ 0010111
GND SCL SCL 0011000
GND SCL SDA0011001
GNDSDA SCL 0011010
GNDSDA SDA0011011
V+ SCL SCL 0011100
V+ SCL SDA0011101
V+ SDA SCL 0011110
V+ SDA SDA0011111
GNDGNDGND0100000
GNDGND V+ 0100001
GND V+ GND0100010
GND V+ V+ 0100011
V+ GNDGND0100100
V+ GND V+ 0100101
V+ V+ GND0100110
V+ V+ V+ 0100111
GNDGND SCL 0101000
GNDGNDSDA0101001
GND V+ SCL 0101010
GND V+ SDA0101011
V+ GND SCL 0101100
V+ GND SDA0101101
V+ V+ SCL 0101110
V+ V+ SDA0101111

MAX7313ATG+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Interface - I/O Expanders 16-Bit I/O Port Expander
Lifecycle:
New from this manufacturer.
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