CAT24AA16TDI-GT3

CAT24AA16
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7
READ OPERATIONS
Immediate Read
To read data from memory, the Master creates a START
condition on the bus and then broadcasts a Slave address
with the R/
W
bit set to ‘1’. The Slave responds with ACK
and starts shifting out data residing at the current address.
After receiving the data, the Master responds with NoACK
and terminates the session by creating a STOP condition on
the bus (Figure 10). The Slave then returns to Standby mode.
Selective Read
To read data residing at a specic address, the selected
address must rst be loaded into the internal address register.
This is done by starting a Byte Write sequence, whereby the
Master creates a START condition, then broadcasts a Slave
address with the R/
W
bit set to ‘0’ and then sends an address
byte to the Slave. Rather than completing the Byte Write
sequence by sending data, the Master then creates a START
condition and broadcasts a Slave address with the R/
W
bit
set to ‘1’. The Slave responds with ACK after every byte sent
by the Master and then sends out data residing at the selected
address. After receiving the data, the Master responds with
NoACK and then terminates the session by creating a STOP
condition on the bus (Figure 11).
Sequential Read
If, after receiving data sent by the Slave, the Master
responds with ACK, then the Slave will continue
transmitting until the Master responds with NoACK
followed by STOP (Figure 12). During Sequential Read the
internal byte address is automatically incremented up to the
end of memory, where it then wraps around to the beginning
of memory.
SCL
SDA 8
th
Bit
STOP
NO ACK
DATA OUT
89
SLAVE
ADDRESS
S
A
C
K
DATA
BYTE
N
O
A
C
K
S
T
O
P
P
S
T
A
R
T
BUS ACTIVITY:
MASTER
SLAVE
Figure 10. Immediate Read Sequence and Timing
SLAVE
S
A
C
K
N
O
A
C
K
P
S
T
A
R
T
S
SLAVE
ADDRESS
DATA
BYTE
ADDRESS
BYTEADDRESS
BUS ACTIVITY:
MASTER
SLAVE
S
T
A
R
T
S
T
O
P
Figure 11. Selective Read Sequence
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
S
T
O
P
N
O
A
C
K
A
C
K
P
SLAVE
ADDRESS
DATA
BYTE
n
DATA
BYTE
n+1
DATA
BYTE
n+2
DATA
BYTE
n+x
BUS ACTIVITY:
MASTER
SLAVE
Figure 12. Sequential Read Sequence
CAT24AA16
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8
ORDERING INFORMATION
Device Order Number
Specific
Device Marking
Package
Type
Temperature
Range (Note 24)
Lead
Finish
Shipping
CAT24C02TDIGT3 UK TSOT235 Industrial NiPdAu Tape & Reel, 3,000 Units / Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
9. All packages are RoHScompliant (Leadfree, Halogenfree).
10.The standard lead finish is NiPdAu.
11. For additional package and temperature options, please contact your nearest ON Semiconductor Sales office.
12.For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
ON Semiconductor is licensed by the Philips Corporation to carry the I
2
C bus protocol.
TSOT23, 5 LEAD
CASE 419AE01
ISSUE O
DATE 19 DEC 2008
E1 E
A2
A1
e
b
D
c
A
TOP VIEW
SIDE VIEW END VIEW
L1
L
L2
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-193.
SYMBOL
θ
MIN NOM MAX
q
A
A1
A2
b
c
D
E
E1
e
L
L1
L2
0.01
0.80
0.30
0.12
0.30
0.05
0.87
0.15
2.90 BSC
2.80 BSC
1.60 BSC
0.95 TYP
0.40
0.60 REF
0.25 BSC
1.00
0.10
0.90
0.45
0.20
0.50
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
http://onsemi.com
1
© Semiconductor Components Industries, LLC, 2002
October, 2002 Rev. 0
Case Outline Number:
XXX
DOCUMENT NUMBER:
STATUS:
REFERENCE:
DESCRIPTION:
98AON34392E
ON SEMICONDUCTOR STANDARD
TSOT23, 5 LEAD
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
PAGE 1 OF 2

CAT24AA16TDI-GT3

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
EEPROM 16K-Bit I2C Serial
Lifecycle:
New from this manufacturer.
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