September 1993 7
Philips Semiconductors Product specification
Octal bus transceiver/register; 3-state 74HC/HCT652
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: bus driver
I
CC
category: MSI.
Note to the HCT types
The value of additional quiescent supply current (∆I
CC
) for unit a load of 1 is given in the family specifications.
To determine ∆I
CC
per input, multiply this value by the unit load coefficient shown in the table below
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
r
=t
f
= 6 ns; C
L
= 50 pF.
INPUT UNIT LOAD COEFFICIENT
S
AB
, S
BA
0.75
A
0
to A
7
and B
0
to B
7
0.75
CP
AB
, CP
BA
1.50
OE
AB
1.50
OE
BA
1.50
INPUT PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
+25 −40 to +85 −40 to +125
V
CC
(V)
WAVEFORMS
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
t
PHL
/t
PLH
propagation delay
A
n
, B
n
to B
n
, A
n
− 16 27 − 34 − 41 ns 4.5 Fig.6
t
PHL
/t
PLH
propagation delay
CP
AB
, CP
BA
to B
n
, A
n
− 23 39 − 49 − 59 ns 4.5 Fig.7
t
PHL
/t
PLH
propagation delay
S
AB
, S
BA
to B
n
, A
n
− 27 46 − 55 − 66 ns 4.5 Fig.8
t
PZH
/t
PZL
3-state output enable
time
OE
AB
, OE
BA
to A
n
, B
n
− 18 33 − 41 − 50 ns 4.5 Fig.9
t
PHZ
/t
PLZ
3-state output disable
time
OE
AB
, OE
BA
to A
n
, B
n
− 16 35 − 44 − 53 ns 4.5 Fig.9
t
THL
/t
TLH
output transition time − 512−15 − 18 ns 4.5 Fig.6, 8
t
W
clock pulse width
HIGH or LOW
CP
AB
or CP
BA
16 6 − 20 − 24 − ns 4.5 Fig.7
t
su
set-up time
A
n
, B
n
to CP
AB
, CP
BA
10 5 − 13 − 15 − ns 4.5 Fig.7
t
h
hold time
A
n
, B
n
to CP
AB
, CP
BA
5 −2 − 6 − 8 − ns 4.5 Fig.7
f
max
maximum clock pulse
frequency
30 83 − 24 − 20 − MHz 4.5 Fig.7