13
Figure 21. Recommended LED Drive Circuit for Ultra High CMR.
Figure 19. Not Recommended Open Collector LED Drive Circuit. Figure 20. AC Equivalent Circuit for Figure 19 during Common Mode Transients.
Figure 22. Typical Application Circuit.
6
5
4
1
3
SHIELD
Q1
+5 V
20 k:
6
5
4
1
3
* THE ARROWS INDICATE THE DIRECTION OF CURRENT
FLOW FOR +dV
CM
/dt TRANSIENTS.
V
OUT
100 pF
C
LEDP
C
LEDN
SHIELD
C
LED01
+
I
CLEDN
*
Q1
V
CM
6
5
4
1
3
SHIELD
+5 V
0.1 PF
20 k:
6
5
4
1
3
SHIELD
CMOS
310 :
+5 V
V
OUT1
HCPL-M456
I
LED1
V
CC1
0.1 PF
20 k:
6
5
4
1
3
SHIELD
CMOS
310 :
+5 V
V
OUT2
HCPL-M456
I
LED2
V
CC2
M
Q2
Q1
-HV
+HV
IPM
HCPL-M456
HCPL-4506
HCPL-M456
HCPL-M456
HCPL-M456
Figure 23. Minimum LED Skew for Zero Dead Time. Figure 24. Waveforms for Deadtime Calculation.
V
OUT1
V
OUT2
I
LED2
t
PLH MAX.
PDD* MAX. =
(t
PLH
-
t
PHL
)
MAX. =
t
PLH MAX.
-
t
PHL MIN.
t
PHL MIN.
I
LED1
Q1 ON
Q2 OFF
Q1 OFF
Q2 ON
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE: THE PROPAGATION DELAYS USED TO CALCULATE
PDD ARE TAKEN AT EQUAL TEMPERATURES.
V
OUT1
V
OUT2
I
LED2
t
PLH MIN.
MAXIMUM DEAD TIME (DUE TO OPTOCOUPLER)
= (t
PLH MAX.
-
t
PLH MIN.
)
+
(t
PHL MAX.
-
t
PHL MIN.
)
= (t
PLH MAX.
-
t
PHL MIN.
) -
(t
PLH MIN.
-
t
PHL MAX.
)
= PDD* MAX. - PDD* MIN.
t
PHL MIN.
I
LED1
Q1 ON
Q2 OFF
Q1 OFF
Q2 ON
*PDD = PROPAGATION DELAY DIFFERENCE
t
PLH MAX.
t
PHL MAX.
PDD*
MAX.
MAX.
DEAD TIME
NOTE: THE PROPAGATION DELAYS USED TO CALCULATE THE MAXIMUM
DEAD TIME ARE TAKEN AT EQUAL TEMPERATURES.
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Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2011 Avago Technologies. All rights reserved.
AV02-3306EN - December 14, 2011

HCPL-M456-500E

Mfr. #:
Manufacturer:
Broadcom / Avago
Description:
Logic Output Optocouplers 1MBd 3750Vdc
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union