ISL24202IRTZ

1
Programmable V
COM
Calibrator with EEPROM
ISL24202
The ISL24202 is an 8-bit programmable current sink that can be
used in conjunction with an external voltage divider to generate a
voltage source (V
COM
) positioned between the analog supply
voltage and ground. The current sink’s full-scale range is
controlled by an external resistor, R
SET
. With the appropriate
choice of external resistors R
1
and R
2
, the V
COM
voltage range
can be controlled between any arbitrary voltage range. The
ISL24202 has an 8-bit data register and 8-bit EEPROM for storing
both a volatile and a permanent value for its output, accessible
through a single up/down counter interface pin (CTL). After the
part is programmed with the desired V
COM
value, the Counter
Enable pin (CE) can be grounded to prevent further changes. On
every power-up the EEPROM contents are automatically
transferred to the data register, and the pre-programmed output
voltage appears at the V
OUT
pin.
The ISL24202 can be used with a high output drive buffer
amplifier, which allows it to directly drive the V
COM
input of an
LCD panel.
The ISL24202 is available in an 8 Ld 3mm x 3mm TDFN
package. This package has a maximum height of 0.8mm for very
low profile designs. The ambient operating temperature range is
-40°C to +85°C
.
Features
Adjustable 8-Bit, 256-Step, Current Sink Output
On-Chip 8-Bit EEPROM
Up/Down Counter Interface
Guaranteed Monotonic Over-Temperature
4.5V to 19.0V Analog Supply Range for Normal Operation
(10.8V Minimum Analog Supply Voltage for Programming)
2.25V to 3.6V Logic Supply Voltage Operating Range
Pb-free (RoHS-Compliant)
Ultra-Thin 8 Ld TDFN (3 x 3 x 0.8mm Max)
Applications
•LCD Panel V
COM
Generator
Electrophoretic Display V
COM
Generator
Related Literature
See AN1633 for ISL24202 Evaluation Board Application Note
“ISL24202IRTZ-EVALZ Evaluation Board User Guide” (Coming
Soon)
MICRO-
CONTROLLER
ISL24202
CE
CTL
OUT
SET
V
DD
AV
DD
8
5
4
7
6
1
2
R
SET
R
1
R
2
LCD PANEL
V
COM
I/O PIN
I/O PIN*
* 0, 1, TRI-STATE
EL5411T
FIGURE 1. TYPICAL ISL24202 APPLICATION
March 15, 2011
FN7587.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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|Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL24202
2
FN7587.0
March 15, 2011
Block Diagram
Pin Descriptions Pin Configuration
ISL24202
(8 LD TDFN)
TOP VIEW
FIGURE 2. BLOCK DIAGRAM OF THE ISL24202
GND
DIGITAL
INTERFACE
DAC
REGISTERS
8-BIT EEPROM
CTL
DNC
CE
AV
DD
SET
8
2
6
7
4
CS
OUT
1
Q1
A1
ANALOG DCP
AND
CURRENT SINK
UP/DOWN
COUNTER
5
V
DD
3
V
DD
R
BIAS
R
BIAS
PIN NAME PIN # FUNCTION
OUT 1 Adjustable Sink Current Output Pin. The sink current into
the OUT pin is equal to the DAC setting times the
maximum adjustable sink current divided by 256. See
the “SET” pin function description below (pin 8) for
setting the maximum adjustable sink current.
A
VDD
2 High-Voltage Analog Supply. Bypass to GND with 0.1µF
capacitor.
DNC 3 Do Not Connect to external circuitry. It is acceptable to
ground this pin.
GND 4 Ground connection.
V
DD
5 Digital power supply input. Bypass to GND with 0.1µF
de-coupling capacitor.
CTL 6 Up/Down Control for internal counter and Internal
EEPROM Programming Control Input. When CE is high:
A low-to-mid transition increments the 8-bit counter,
adding 1 to the DAC setting, increasing the OUT sink
current, and lowering the divider voltage at the OUT pin.
A high-to-mid transition decrements the 8-bit counter,
subtracting 1 from the DAC setting, decreasing the OUT
sink current, and increasing the divider voltage at the
OUT pin.
To program the EEPROM, take this pin to >4.9V (see
“CTL EEPROM Programming Signal Time” in the
“Electrical Specifications” table on page 5 for details).
Float when not in use.
CE 7 Counter Enable Pin. Connect CE to V
DD
to enable
adjustment of the output sink current. Float or connect
CE to GND to prevent further adjustment or
programming (Note: the CE pin has an internal 500nA
pull-down sink current). The EEPROM value will be
copied to the register on a V
OH
to V
OL
transition.
SET 8 Maximum Sink Current Adjustment Pin. Connect a
resistor from SET to GND to set the maximum
adjustable sink current of the OUT pin. The maximum
adjustable sink current is equal to (AV
DD
/20) divided
by R
SET
.
PAD - Thermal pad should be connected to system ground
plane to optimize thermal performance.
(*CONNECT THERMAL PAD TO GND)
OUT
A
VDD
DNC
GND
1
2
3
4
8
7
6
5
SET
CE
CTL
V
DD
PAD
ISL24202
3
FN7587.0
March 15, 2011
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING INTERFACE
TEMP RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL24202IRTZ 202Z COUNTER -40 to +85 8 Ld 3x3 TDFN L8.3x3A
ISL24202IRTZ-EVALZ Evaluation Board
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page ISL24202
. For more information on MSL please see techbrief TB363.

ISL24202IRTZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
LCD Gamma Buffers ISL24202IRTZFREE VCO M CLBTR W/AN I2C
Lifecycle:
New from this manufacturer.
Delivery:
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