FEMTOCLOCK™ CRYSTAL-TO-LVDS/LVCMOS FREQUENCY 16 Rev B 7/2/15
8402015 DATA SHEET
Reliability Information
Table 8.
JA
vs. Air Flow Table for a 32 Lead VFQFN
Transistor Count
The transistor count for 8402015 is: 2311
Package Outline and Package Dimensions
Package Outline - K Suffix for 32 Lead VFQFN
Table 9. Package Dimensions
Reference Document: JEDEC Publication 95, MO-220
NOTE: The following package mechanical drawing is a generic
drawing that applies to any pin count VFQFN package. This drawing
is not intended to convey the actual pin count or pin layout of this
device. The pin count and pinout are shown on the front page. The
package dimensions are in Table 9.
JA
vs. Air Flow
Meters per Second 012.5
Multi-Layer PCB, JEDEC Standard Test Boards 37.0°C/W 32.4°C/W 29.0°C/W
To p View
Index Area
D
Chamfer 4x
0.6 x 0.6 max
OPTIONAL
Anvil
Singula tion
A
0. 08 C
C
A3
A1
S eating Plan e
E2
E2
2
L
(N
-1)x e
(R ef.)
(Ref.)
N & N
Even
N
e
D2
2
D2
(Ref.)
N & N
Odd
1
2
e
2
(Ty p.)
If N & N
are Even
(N -1)x e
(Re f.)
b
Th er mal
Ba se
N
OR
Anvil
Singulation
or
Sawn
Singulation
JEDEC Variation: VHHD-2/-4
All Dimensions in Millimeters
Symbol Minimum Nominal Maximum
N 32
A 0.80 1.00
A1 00.05
A3 0.25 Ref.
b 0.18 0.25 0.30
N
D
& N
E
8
D & E 5.00 Basic
D2 & E2 3.0 3.3
e 0.50 Basic
L 0.30 0.40 0.50
