Rev B 7/2/15 7 FEMTOCLOCK™ CRYSTAL-TO-LVDS/LVCMOS FREQUENCY
8402015 DATA SHEET
Table 6. AC Characteristics, V
DD
= V
DDO_A
= V
DDO_B
= V
DDO_C
= V
DDO_REF
= 3.3V±5%, T
A
= -40°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device
is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal
equilibrium has been reached under these conditions.
NOTE 1: Please refer to Phase Noise Plots.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Defined as skew within a bank of outputs at the same supply voltage and with equal load conditions.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
out
Output Frequency
QA[0:2] 25 MHz
QA[0:1] 50 MHz
QB[0:2] 125 MHz
QC[0:2]/
nQC[0:2]
125 MHz
REF_OUT 25 MHz
tjit(Ø)
RMS Phase Noise
Jitter; NOTE 1
QA0:QA2,
REF_OUT
25MHz, Integration Range:
12kHz - 1MHz
0.642 ps
QB0:QB2
125MHz, Integration Range:
637kHz - 62.5MHz
0.389 ps
QC0:QC2
125MHz, Integration Range:
637kHz - 62.5MHz
0.373 ps
tsk(b)
Bank Skew;
NOTE 2, 3
QA[0:2], QB[0:2] 45 ps
QC[0:2]/nQC[0:2] 35 ps
t
R
/ t
F
Output
Rise/Fall Time
QA[0:2], QB[0:2],
REF_OUT
20% to 80% 0.425 1.15 ns
QC[0:2]/
nQC[0:2]
20% to 80% 145 415 ps
odc
Output
Duty Cycle
QA[0:2], QB[0:2],
REF_OUT
48 52 %
QC[0:2]/
nQC[0:2]
48 52 %
