HPM10-W29A100G Datasheet HPM10-W29A100G | P13-P15

HPM10

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Interfaces to Host DSP

In Hearing Aid Mode, the SWOUT pin provides a level

shifted version of the SWIN pin. The SWOUT pin would

typically be connected to the host DSP’s GPIO pin so that the

button on the hearing aid connected to SWIN can also be

used for other functions such as memory select or volume

control.

The DS_EN input pin is provided for the DSP to trigger

Deep Sleep Mode:

• It is active in Hearing Aid Mode only, it is ignored in

Cradle Mode

• It is protected from glitches with a 100 msec de−glitch

circuit

• The host DSP will need to hold the pin high for greater

than 100 usec to put HPM10 into Deep Sleep Mode

• It has a 100 kOhm pull down

• During power−up it will be held low as it will be

connected to the host DSP’s GPIO pin with the

following assumptions:

♦ The GPIO is by default in input mode during power

♦ The resistance used for pull−up is greater than 250

KOhm

♦ After boot−up, the host DSP configures the GPIO

pin as an output in a low state

• If the GPIO pull−up resistance is less than 250 kOhm, it

is necessary to add an external resistor to VSS such that

the ratio of pull−up to pull−down resistance is more

than 2.5

DIV3 (Step Down Charge Pump)

In Hearing Aid Mode, the DIV3 step−down charge pump

(CP) is used when Li−Ion batteries are used. The DIV3 CP

uses 2 external capacitors plus 1 decoupling capacitor to

divide the VBAT by a factor of 3. The output impedance of

the charge pump is fixed, and the VHA will track variation

in VBAT.

If VBAT is insufficient to power DIV3 CP, the DIV3 CP

will be shut off. Based on the Li_Ion discharge curve, the

battery is nearly discharged when VBAT<3.1V, and so a

threshold around 3.1 V would be acceptable for the DSP to

use as a turn off threshold. This is equivalent to 3.1/3=1.03 V

on VHA. The HPM10 turn off threshold is much lower

(typically 2.8 V) as a fail−safe in case the DSP is unable to

turn off HPM10.

The DIV3 CP can only be activated when in Hearing Aid

Mode.

The input clock to DIV3 CP comes initially from the

hearing aid oscillator, which also is only active in HA mode.

After the DIV3 starts up and the DSP turns on, if there is

detected a clock signal on the EXT_CLK pad, it will be used

as the master clock in Hearing Aid Mode. When using the

EXT_CLK, the range of frequency can be as much as

−2%/+95% due to the limited division steps.

AgZn Regulator

In Hearing Aid Mode, the AgZn regulator can be used to

limit voltage below 1.5 V when the voltage is above 1.5 V

(first discharge plateau). This regulator will be used in case

the hearing aid DSP input voltage range is limited to 1.5 V.

Disabling this regulator is done by tying the

AGZN_REG_EN pin to ground.

Note that if Zinc−Air or AgZn battery are used and

VBAT < 1.5 V, the AgZn regulator will not be used and the

VBAT will be shorted to the VHA. If VBAT > 1.45 V, the

AgZn regulator is enabled. Hysteresis has been added to all

these thresholds.

If Li−Ion battery is installed, the AgZn Regulator is

disabled and the DIV3 is enabled.

Slave I

In Cradle Mode or during debug: HPM10 has a slave I

port to allow an external host device to access all the HPM10

internal registers when in Cradle Mode. It is also used for

OTP burning, standalone test, and debug. When in Hearing

Aid Mode, the I

C is off.

Charger Communication Interface (CCIF)

This is a bi−directional interface that will communicate

the status of the charging process in Cradle Mode to the

hearing aid charger and allow user interaction with HPM10.

Normally, once the hearing aid is assembled and the battery

attached, this interface is the only means to monitor the

battery health. The CCIF will communicate with the hearing

aid charger using a superset of the ‘Qi’ (inductive power

standard) based communications protocol using an UART

type encoding. This protocol has been developed for

wireless charging systems. Although this version of HPM10

is only supporting wired charging, this protocol will be used

to facilitate an easier migration to a wireless charging mode.

The data rate is fixed to 2 kHz.

Some of the information sent in this mode is:

• Battery voltage

• Current levels

• Ambient temperature

• Accumulated charge

• Charge mode phase

• Battery chemistry type

• Fault conditions

This communication supports data transfer between the

HPM10 and the Primary Charger. This physical link is the

VDDP power connection. Bidirectional communication

(half−duplex) is supported. The communication from the

HPM10 to Primary is using “load modulation”, where the

VDDP is loaded with a low valued resistor to represent a “0”.

The communication from Primary to HPM10 uses VDDP

voltage modulation.

HPM10 to Primary Charger (Transmit): The CCIF

digital signal (UART type) is converted into a modulated

HPM10

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load on the VDDP wired supply. This current modulation is

superimposed on the existing current that is used to charge

the battery. State transitions will cause short current

transient steps that need to be ignored by the Primary

Charger data detector. To support the HPM10 usage in a

wireless recharging device, an alternate interface has been

provided. It is composed of pad “CCIF” that is a digital

output duplicating the raw UART signal (i.e. not the

differential encoded data).

The CCIF pin can be configured in the OTP to provide a

static signal that can be used by the system to provide

information on the battery charge as follow:

CCIF Pin State Corresponding Information

HI Charge Complete

LO Fault

HI−Z Neither

In OTP Burn mode (ATST_EN=HIGH), the CCIF pin is

used as an external reset input active LOW. This reset is

necessary during the OTP READ procedure and it is to

ensure that digital is in a known good state and the OTP

contents have been loaded before doing the read. The CCIF

pin, when in input mode, does not have a pull−up or

pull−down resistor so it should not be left floating.

Primary Charger to HPM10 (Receive): The Primary

Charger can use voltage modulation of VDDP to transmit

data to the HPM10. HPM10 uses edge detection and AC

coupling to extract the data easily without a precise

amplitude requirement. This helps relax the requirements on

the drive signal and the loading of the VDDP line by the

Charge Control block. For robust pulse detection, the

rise/fall time of the 200 mV modulation should be less than

100 ms.

Battery Monitoring

HPM10 employs two methods of battery monitoring:

1. In Cradle Mode, the high−precision 10 bit ADC

continuously measures voltage and current to the

battery.

2. In Hearing Aid Mode, the system uses

instantaneous voltage to analog comparators to

perform simple detection of battery chemistry.

Refer to the Hearing Aid Mode section on page 19

for more information.

Figure 5 illustrates how the battery monitoring is done in

a hearing aid system using HPM10.

Time

VBAT

Veol

Vsafety

Hearing Aid mode

Deep Sleep

Mode

Transition

period

Figure 5. Battery Monitoring for Battery End of Life (EOL)

The hearing aid DSP will have to determine its Veol

threshold, and detect when the VBAT reaches this level.

From this point, the hearing aid DSP will have to manage its

battery EOL procedure (playing a beep users hear, managing

datalogging, etc.) before its toggles the DS_EN pin.

If the DS_EN pin hasn’t been toggled by the hearing aid

DSP and if the hearing aid DSP keeps on drawing power

from the battery, HPM10 will preserve the rechargeable

battery from over−discharging by forcing Deep Sleep Mode

when VBAT reaches Vsafety. In this mode, the VHA supply

is stopped (SAFE_MODE status bit = 0). Vsafety is 2.8 V for

Li−Ion and 1.0 V for AgZn.

Battery Charging Control

While in Cradle Mode, HPM10 controls the charging of

the attached battery. The charging cycle is different for each

battery type, with the charging phase transition points for

each chemistry (voltage, current temperature and time)

stored in OTP and available to the micro−controller in

Cradle mode.

The chemistries that are supported by HPM10 are

Silver−Zinc (AgZn) and Lithium−Ion (Li−ion). While

Zinc−Air (ZnAir) and Nickel−Metal Hydride (Ni−MH)

batteries are detected, they are not charged.

HPM10

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As shown in Figure 6, a charger state machine operates in

five phases to manage the charging process:

• Start−up (SU):

♦ Battery type detection

♦ OTP boot and CRC checking

• Initialization (INIT):

♦ Li−ion pre−charge (trickle)

♦ Li−ion advanced charging algorithms

♦ Over−discharge recovery for AgZn.

• Phase 1 (PH1):

♦ Li−Ion: Maintain a constant current and monitor the

voltage.

♦ AgZn: Lower plateau (Ag

O) and transition zone

charging region

♦ Exit if the voltage set point has been reached or

time−out has occurred.

• Phase 2 (PH2):

♦ Li−Ion: Maintain a constant voltage and monitor the

current.

♦ AgZn: Upper plateau (AgO) charging region

♦ Exit if the current set point has been reached or

time−out has occurred.

• Completion (CMPLT): Battery charging process is

stopped. Any faults that occurred are stored and

communicated to the external charger.

If ZnAir or Ni−MH is detected, then the state machine

moves to completion phase.

The control loop for controlling the current and voltage

for the charging process consists of monitoring both current

and voltage with the ADC and controlling the current

supplied with a 10−bit current DAC.

Start−up

Li−ion

Completion

AgZn

Zone1

AgZn

Zone2

fault

ZnAir

fault

Li−ion

ZnAir

AgZn

CH_CONN=0

INIT PH1 PH2 CMPLT

EXITENTER

fault

Li−ion

AgZn

Zone0

Figure 6. Charging Algorithm Diagram Flow

Clocking

HPM10 has two clock sources:

• In Cradle Mode, the CM_CLK clock is coming from an

internal RC oscillator. This clock controls the charging

process (timing and state machine), since an accurate

time reference is required during this state. This clock

is used only in Cradle Mode.

• In Hearing Aid Mode, the HA_CLK is either selected

from either an internal RC oscillator or a divided down

version of an external clock signal, EXT_CLK. The

external clock selection is automatic. If a clock is

detected on EXT_CLK it will override the internal

oscillator. The motivation for this selection is to have a

single clock in the combined system, to avoid pollution

on the supplies that will feed into the audio path. When

the external clock is used, it must be divided down so

the resultant frequency is in the same frequency range

as the internal clock (i.e. 64 kHz −2/+95%. The division

ratios that are possible are divided by 2, 4, 8, 16, 32, 64,

128 and 256 (3 bits). The hearing aid manufacturer is

responsible for setting the appropriate ratio using the

CLKDIV[2:0] pins in order to use an external clock

pin. This can be done from the DSP or can be

connected on the printed circuit board. This clock is

used only in Hearing Aid Mode, and in OTP burn mode

(ATST_EN=VDDIO).

There is no clock active during the Deep Sleep Mode.

Supply Management

There are several forms of supply management on

HPM10:

• Battery Charge Control: This block provides either a

constant current or constant voltage to the attached

battery. Both the current and voltage levels are

programmable when in their respective phases.

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HPM10-W29A100G

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