HPM10
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16
• Step−Down Charge Pump: A high efficiency charge
pump, generating a voltage equal to 1/3 of the battery
voltage is used for Li−Ion batteries. It supplies directly
to the hearing aid chip as the main power supply. The
output impedance of the charge pump is low (less than
10 ohms).
• Digital Voltage Regulator: This block provides the
supply voltage to the digital logic, low voltage
band−gaps, oscillator, I/V sense, and ADC when in
Charge Mode
• Hearing Aid Mode Voltage Regulator: This block
provides the supply voltage to all the analog blocks
when in Hearing Aid Mode.
• Digital Interfaces
♦ The digital inputs and outputs SDA, SCL and CCIF
are powered from the VDDIO supply pin, which can
be connected to DVREG or another available supply.
VDDIO is not used in Hearing Aid mode. When the
I
2
C interface is used for debugging, it is preferable
that VDDIO is powered externally to minimize
measurement errors.
♦ The digital inputs and outputs SWOUT, DS_EN,
EXT_CLK, CLKDIV[2:0], AGZN_REG_EN and
WARN are powered from the VHA.
• Voltage References: There are two bandgap voltage
references on the chip. One is a precision bandgap used
to generate the high−precision voltage references
needed for charging. It also generates other references
for the ADC, OSC, and current reference. A 1 V low
resolution bandgap is used in Hearing Aid Mode for
wakeup and Veol comparators.
General Purpose Analog−to−Digital Converter (ADC)
The general purpose ADC with input mux will allow the
state machine to properly manage the charging algorithm
based on analog measurements.
The signals being monitored include:
• Battery voltage (VBAT)
• Charge current
• Internal temperature
• Charger input voltage (VDDP)
• VREF (from BandGap, used to calibrate ADC offset)
Power Domains
The input/output is divided into several independent
power domains, each with their own ESD clamping
structures to allow flexibility in the allowed voltages that
can be present on the pins, shown in Table 7.
Table 7. POWER DOMAIN DESCRIPTIONS
Power Domain Pins Description
VDDP DVREG Full voltage range
VDDIO SCL, SDA, CCIF, ATST_EN All digital input/output used in Cradle Mode
VHA SWOUT, WARN, DS_EN, EXT_CLK, CLKDIV[2:0],
AGZN_REG_EN
All digital input/output used in Hearing Aid mode
VBAT SWIN, VHA, CP1A, CP1B, Cp2A, CP2B All voltages derived from VBAT
VDD_OTP Supports overvoltage for OTP burning
VSS VSS, VSSA, VSSCP All grounds are shorted together < 2 ohms
Development Tools
A full suite of comprehensive tools is available to assist
developers from the initial concept and technology
assessment through to prototyping and product launch.
An Evaluation Board and a Charger Board are available
for customers to demonstrate, evaluate, and develop
products based on HPM10.
HPM10 Programming Interface: This application is
primarily used on the production line. It allows a technician
to program HPM10’s OTP predetermined register values. A
user’s manual will describe the product application features.
The communication between the PC and HPM10 will be
supported by either the Promira Serial Platform from
TotalPhase, Inc. or the Communication Accelerator Adaptor
(CAA) from ON Semiconductor. On the PC, the
communication box will use a USB interface. On HPM10,
the I
2
C interface of HPM10 will be used.
Company or Product Inquiries
For more information about ON Semiconductor products
or services visit our Web site at http://onsemi.com
.
