LTC3553-2
29
35532f
OPERATION
POFF state, the state machine immediately recognizes that
valid external power is available and transitions into the
PUP2 state. Entering the PUP2 state will cause the buck to
p o w e r u p a s d e s c r i b e d p r e v i o u s l y i n t h e p o w e r- u p s e c t i o n s .
Not depicted here, but in cases where the BUCK_ON pin
is driven by a supply that remains high when entering the
POFF state, then as per the state diagram in Figure 7, the
pushbutton circuitry will enter the PON state once V
OUT
is no longer in UVLO. Upon entering the PON state, the
buck regulator will power up.
Note: If V
OUT
drops too low (below about 1.9V) the LTC3553-2
will see this as a POR condition and will enter the PDN1
state rather than the PDN2 state. One second later the
part will transition to the HR state. Under these conditions
an explicit power-up event (such as a pushbutton press)
may be required to bring the LTC3553-2 out of hard reset.
Hard Reset Timing
HARD RESET provides an ultralow power-down state for
shipping or long term storage as well as a way to power
down the application in case of a software lockup. In the
case of software lockup, the user can hold the pushbutton
(ON low) for 14 seconds and a hard reset event (HRST) will
occur, placing the pushbutton circuitry in the power-down
(PDN1) state. At this point the buck regulator will be shut
down. Following a one second power-down period the
pushbutton circuitry will enter the hard reset state (HR).
At this point the LDO regulator will be shut down.
Holding ON low through the one second power-down
period will not cause a power-up event at end of the one
second period. ON must be brought high following the
power-down event and then go low again for 400ms to
establish a valid power-up event, as shown in Figure 11.
Figure 11. Hard Reset via Holding ON Low for 14 Seconds
BAT
V
BUS
ON (PB)
PBSTAT
PGOOD
BUCK_ON
STATE PON PUP1HRPDN1
35532 F11
400ms
50ms
14s
1s
1
0
1
0
1
0
1
0
BUCK
1
0
LDO
1
0
1
0
1
0
1.8ms
