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M95020-MN6

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42
DC and AC parameters M95040, M95020, M95010
28/42
Table 15. DC characteristics (M950x0-W, device grade 3)
Symbol Parameter Test condition Min. Max. Unit
I
LI
Input leakage current V
IN
= V
SS
or
V
CC
± 2 µA
I
LO
Output leakage current S = V
CC
, V
OUT
= V
SS
or
V
CC
± 2 µA
I
CC
Supply current
C = 0.1V
CC
/0.9V
CC
at 5 MHz,
V
CC
= 2.5 V, Q = open
2mA
I
CC1
Supply current
(Standby Power mode)
S = V
CC
, V
IN
= V
SS
or
V
CC
V
CC
= 2.5 V
2µA
V
IL
Input low voltage –0.45 0.3 V
CC
V
V
IH
Input high voltage 0.7 V
CC
V
CC
+1 V
V
OL
Output low voltage I
OL
= 1.5 mA, V
CC
= 2.5 V 0.4 V
V
OH
Output high voltage I
OH
= –0.4 mA, V
CC
= 2.5 V 0.8 V
CC
V
Table 16. DC characteristics (M950x0-R, device grade 6)
Symbol Parameter Test condition Min. Max. Unit
I
LI
Input leakage
current
V
IN
= V
SS
or
V
CC
± 2 µA
I
LO
Output leakage
current
S = V
CC
, voltage applied on Q = V
SS
or
V
CC
± 2 µA
I
CCR
Supply current
(Read)
V
CC
= 2.5 V, C = 0.1 V
CC
or 0.9V
CC
,
f
C
= 5 MHz, Q = open
3mA
V
CC
= 1.8 V, C = 0.1V
CC
or 0.9V
CC
at
max clock frequency, Q = open
2mA
I
CC1
Supply current
(Standby)
V
CC
= 5.0 V, S = V
CC
, V
IN
= V
SS
or V
CC
2µA
V
CC
= 2.5 V, S = V
CC
, V
IN
= V
SS
or V
CC
1µA
V
CC
= 1.8 V, S = V
CC
, V
IN
= V
SS
or V
CC
1µA
V
IL
Input low voltage
2.5V < V
CC
< 5.5V –0.45 0.3V
CC
V
1.8V < V
CC
< 2.5V –0.45 0.25V
CC
V
V
IH
Input high voltage
2.5V < V
CC
< 5.5V 0.7V
CC
V
CC
+1 V
1.8V < V
CC
< 2.5V 0.75V
CC
V
CC
+1 V
V
OL
Output low voltage
V
CC
= 2.5 V, I
OL
= 1.5 mA,
or V
CC
= 5.5 V, I
OL
= 2 mA
0.2V
CC
V
V
CC
= 1.8 V, I
OL
= 0.15 mA 0.3 V
V
OH
Output high voltage
V
CC
= 2.5 V, I
OH
= –0.4 mA,
or V
CC
= 5.5 V, I
OH
= –2 mA,
or V
CC
= 1.8 V, I
OH
= –0.1 mA
0.8V
CC
V
M95040, M95020, M95010 DC and AC parameters
29/42
Table 17. AC characteristics (M950x0, device grade 3)
Test conditions specified in Tabl e 11 and Tabl e 8
Symbol Alt. Parameter Min. Max. Unit
f
C
f
SCK
Clock frequency D.C. 5 MHz
t
SLCH
t
CSS1
S active setup time 90 ns
t
SHCH
t
CSS2
S not active setup time 90 ns
t
SHSL
t
CS
S deselect time 100 ns
t
CHSH
t
CSH
S active hold time 90 ns
t
CHSL
S not active hold time 90 ns
t
CH
(1)
1. t
CH
+ t
CL
must never be less than the shortest possible clock period, 1 / f
C
(max)
t
CLH
Clock high time 90 ns
t
CL
(1)
t
CLL
Clock low time 90 ns
t
CLCH
(2)
2. Value guaranteed by characterization, not 100% tested in production.
t
RC
Clock rise time 1 µs
t
CHCL
(2)
t
FC
Clock fall time 1 µs
t
DVCH
t
DSU
Data in setup time 20 ns
t
CHDX
t
DH
Data in hold time 30 ns
t
HHCH
Clock low hold time after HOLD not active 70 ns
t
HLCH
Clock low hold time after HOLD active 40 ns
t
CLHL
Clock low setup time before HOLD active 0 ns
t
CLHH
Clock low setup time before HOLD not active 0 ns
t
SHQZ
(2)
t
DIS
Output disable time 100 ns
t
CLQV
t
V
Clock low to output valid 60 ns
t
CLQX
t
HO
Output hold time 0 ns
t
QLQH
(2)
t
RO
Output rise time 50 ns
t
QHQL
(2)
t
FO
Output fall time 50 ns
t
HHQV
t
LZ
HOLD high to output valid 50 ns
t
HLQZ
(2)
t
HZ
HOLD low to output high-Z 100 ns
t
W
t
WC
Write time 5 ms
DC and AC parameters M95040, M95020, M95010
30/42
Table 18. AC characteristics (M950x0-W, device grade 6)
Test conditions specified in Tabl e 1 1 and Tab l e 9
Symbol Alt. Parameter Min. Max. Unit
f
C
f
SCK
Clock frequency D.C. 10 MHz
t
SLCH
t
CSS1
S active setup time 15 ns
t
SHCH
t
CSS2
S not active setup time 15 ns
t
SHSL
t
CS
S deselect time 40 ns
t
CHSH
t
CSH
S active hold time 25 ns
t
CHSL
S not active hold time 15 ns
t
CH
(1)
1. t
CH
+ t
CL
must never be less than the shortest possible clock period, 1 / f
C
(max)
t
CLH
Clock high time 40 ns
t
CL
(1)
t
CLL
Clock low time 40 ns
t
CLCH
(2)
2. Value guaranteed by characterization, not 100% tested in production.
t
RC
Clock rise time 1 µs
t
CHCL
(2)
t
FC
Clock fall time 1 µs
t
DVCH
t
DSU
Data in setup time 15 ns
t
CHDX
t
DH
Data in hold time 15 ns
t
HHCH
Clock low hold time after HOLD not active 15 ns
t
HLCH
Clock low hold time after HOLD active 20 ns
t
CLHL
Clock low setup time before HOLD active 0 ns
t
CLHH
Clock low setup time before HOLD not active 0 ns
t
SHQZ
(2)
t
DIS
Output disable time 25 ns
t
CLQV
t
V
Clock low to output valid 35 ns
t
CLQX
t
HO
Output hold time 0 ns
t
QLQH
(2)
t
RO
Output rise time 20 ns
t
QHQL
(2)
t
FO
Output fall time 20 ns
t
HHQV
t
LZ
HOLD high to output valid 25 ns
t
HLQZ
(2)
t
HZ
HOLD low to output high-Z 35 ns
t
W
t
WC
Write time 5 ms
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42

M95020-MN6

Mfr. #:
Buy M95020-MN6
Manufacturer:
STMicroelectronics
Description:
EEPROM 5.5V 2K (256x8)
Lifecycle:
New from this manufacturer.
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