LTC3829
13
3829fc
For more information www.linear.com/LTC3829
OPERATION
(Refer to Functional Diagram)
A phase-locked loop (PLL) is available on the LTC3829
to synchronize the internal oscillator to an external clock
source that is connected to the PLLIN pin. The PLL loop
filter network is integrated inside the LTC3829. The phase-
locked loop is capable of locking any frequency within
the range of 250kHz to 770kHz. The frequency setting
resistor should always be present to set the controller’s
initial switching frequency before locking to the external
clock. The controller is operating in forced continuous
mode when it is synchronized.
Sensing the Output Voltage with a
Differential Amplifier
The
LTC3829 includes a low offset, unity-gain, high band-
width differential
amplifier
for applications that require true
remote sensing. Sensing the load across the load capaci-
tors directly
greatly benefits regulation in high current, low
voltage
applications, where board interconnection losses
can be a significant portion of the total error budget.
The LTC3829 differential amplifier has a typical output slew
rate of 2V/µs. The amplifier is configured for unity gain,
meaning that the difference between DIFFP and DIFFN is
translated to DIFFOUT, relative to SGND.
Care should be taken to route the DIFFP and
DIFFN PCB
traces
parallel to each other all the way to the terminals
of the output capacitor or remote sensing points on the
board. In addition, avoid routing these sensitive traces
near any high speed switching nodes in the circuit. Ide
-
ally, the
DIFFP and DIFFN traces should be shielded by a
low
impedance ground plane to maintain signal integrity.
The maximum output voltage when using the differential
amplifier is INTV
CC
– 1.4V (typically 3.6V). Above this
output voltage the differential amplifier should not be used.
Power Good (PGOOD Pin)
The PGOOD pin is connected to an open drain of an
internal N-channel MOSFET. The MOSFET turns on and
pulls the PGOOD pin low when the V
FB
pin voltage is not
within ±10% of the 0.6V reference voltage. The PGOOD
pin is also pulled low when the RUN pin is below 1.22V or
when the LTC3829 is in the soft-start or tracking phase.
When the V
FB
pin voltage is within the ±10% regulation
window, the MOSFET is turned off and the pin is allowed
to be pulled up by an external resistor to a source of up
to 6V. The PGOOD pin will flag power good immediately
when the
V
FB
pin is within the regulation window. However,
there is an internal 100µs power-bad mask when the V
FB
goes out of the window.
Output Overvoltage Protection
An overvoltage comparator, OV, guards against transient
overshoots (>10%) as well as other more serious condi
-
tions that
may overvoltage the output. In such cases, the
top
MOSFET is turned off and the bottom MOSFET is turned
on until the overvoltage condition is cleared.
Undervoltage Lockout
The LTC3829 has two functions that help protect the
controller in case of undervoltage conditions. A precision
UVLO comparator constantly monitors the INTV
CC
voltage
to ensure that an adequate gate-drive voltage is present.
It locks out the switching action when INTV
CC
is below
3.3V. To prevent oscillation when there is a disturbance
on the INTV
CC
, the UVLO comparator has 600mV of preci-
sion hysteresis.
Another
way to detect an undervoltage condition is to
monitor the V
IN
supply. Because the RUN pin has a preci-
sion turn-on reference of 1.22V, one can use a resistor
divider
to V
IN
to turn on the IC when V
IN
is high enough.
An extra 4.5µA of current flows out of the RUN pin once
the RUN pin
voltage passes 1.22
V. The RUN comparator
itself has about 80mV of hysteresis. One can program
additional hysteresis for the RUN comparator by adjust
-
ing the values of the resistive divider. For accurate V
IN
undervoltage detection, V
IN
needs to be higher than 4.5V.
LTC3829
14
3829fc
For more information www.linear.com/LTC3829
APPLICATIONS INFORMATION
The Typical Application on the first page of this data sheet
is a basic LTC3829 application circuit. The LTC3829 can be
configured to use either DCR (inductor resistance) sens
-
ing or low value resistor sensing. The choice between the
two current sensing schemes is largely a design trade-off
between cost, power consumption and accuracy. DCR
sensing is becoming popular because it saves expensive
current sensing resistors and is more power efficient,
especially in high current applications. However, current
sensing resistors provide the most accurate current limits
for the controller. Other external component selection is
driven by the load requirement, and begins with the se
-
lection of R
SENSE
(if R
SENSE
is used) and inductor value.
Next, the power MOSFETs are selected. Finally, input and
output capacitors are selected.
Current Limit Programming
The I
LIM
pin is a tri-level logic input which sets the maxi-
mum current
limit of the controller. When I
LIM
is either
grounded, floated or tied to INTV
CC
, the typical value for
the maximum current sense threshold will be 30mV, 50mV
or 75mV, respectively.
Which setting should be used? For the best current limit
accuracy, use the 75mV setting. The 30mV setting will
allow
for
the use of very low DCR inductors or sense resistors,
but at the expense of current limit accuracy. The 50mV
setting is a good balance between the two.
SENSE
+
and SENSE
Pins
The SENSE
+
and SENSE
pins are the inputs to the current
comparators. The common mode input voltage range of
the current comparators is 0V to 5V. All SENSE
+
pins are
high impedance inputs with small currents of less than
1µA. The high impedance inputs to the current compara
-
tors allow accurate DCR sensing. All SENSE
pins and
DIFFP should be connected to V
OUT
directly when DCR
sensing is used. Care must be taken not to float these
pins during normal operation. Filter components mutual
to the sense lines should be placed close to the LTC3829,
and the sense lines should run close together to a Kelvin
connection underneath the current sense element (shown
in Figure 1). Sensing current elsewhere can effectively add
parasitic inductance and capacitance to the current sense
element, degrading the information at the sense terminals
and making the programmed current limit unpredictable.
If DCR sensing is used (Figure 2b), sense resistor R1
should be placed close to the switching node
, to prevent
noise from coupling into sensitive small-signal nodes.
The capacitor C1 should be placed close to the IC pins.
C
OUT
TO SENSE FILTER,
NEXT TO THE CONTROLLER
R
SENSE
3829 F01
Figure 1. Sense Lines Placement with Sense Resistor
Low Value Resistors Current Sensing
A typical sensing circuit using a discrete resistor is shown
in Figure 2a. R
SENSE
is chosen based on the required
output current. The current comparator has a maximum
threshold V
SENSE(MAX)
determined by the I
LIM
setting. The
input common mode range of the current comparator
is 0V to 5V. The current comparator threshold sets the
peak of the inductor current, yielding a maximum average
output current I
MAX
equal to the peak value less half the
peak-to-peak ripple current, I
L
. To calculate the sense
resistor value, use the equation:
R
SENSE
=
V
SENSE(MAX)
I
MAX
+
I
L
2
Because of possible PCB noise in the current sensing loop,
the AC current sensing ripple of V
SENSE
= I
L
R
SENSE
also needs to be checked in the design to get a good
signal-to-noise ratio. In general, for a reasonably good
PCB layout, a 10mV V
SENSE
voltage is recommended as
a conservative number to start with, either for R
SENSE
or
DCR sensing applications. For previous generation current
mode controllers, the maximum sense voltage was high
enough (e.g., 75mV for the LTC1628/LTC3728 family)
that the voltage drop across the parasitic inductance of
the sense resistor represented a relatively small error. For
today’s highest current density solutions, however, the
value of the sense resistor can be less than 1and the
LTC3829
15
3829fc
For more information www.linear.com/LTC3829
APPLICATIONS INFORMATION
peak sense voltage can be as low as 20mV. In addition,
inductor ripple currents greater than 50% with operation
up to 1MHz are becoming more common. Under these
conditions the voltage drop across the sense resistor’s
parasitic inductance is no longer negligible. A typical sens
-
ing cir
cuit using a discrete resistor is shown in Figure
2a.
In previous generations of controllers, a small RC filter
placed near the IC was commonly used to reduce the ef
-
fects of capacitive and inductive noise coupled in the sense
traces on the PCB. A typical filter consists of two series
10Ω resistors connected to a parallel 1000pF capacitor,
V
IN
V
IN
INTV
CC
BOOST
TG
SW
BG
PGND
FILTER COMPONENTS
PLACED NEAR SENSE PINS
SENSE
+
SENSE
SGND
LTC3829
V
OUT
3829 F02a
C
F
• 2 • R
F
≤ ESL/R
S
POLE-ZERO
CANCELLATION
SENSE RESISTOR
PLUS PARASITIC
INDUCTANCE
R
S
ESL
C
F
R
F
R
F
V
IN
V
IN
INTV
CC
BOOST
TG
SW
BG
PGND
ITEMP
R
NTC
*PLACE C1 NEAR SENSE
+
,
SENSE
PINS
**PLACE R1 NEXT TO INDUCTOR
INDUCTOR
OPTIONAL
TEMP COMP
NETWORK
DCRL
SENSE
+
SENSE
SGND
LTC3829
V
OUT
3829 F02b
R1**
R2C1*
R
P
R
S
R1
||
R2 × C1 =
L
DCR
R
SENSE(EQ)
= DCR
R2
R1 + R2
(2a) Using a Resistor to Sense Current
(2b) Using the Inductor DCR to Sense Current
Figure 2. Tw o Different Methods of Sensing Current
resulting in a time constant of 20ns. This same RC filter,
with minor modifications, can be used to extract the resis-
tive component
of the current sense signal in the presence
of parasitic inductance. For example, Figure 3 illustrates
the voltage waveform across a 2sense resistor with
a 2010 footprint for the 1.2V/15A converter operating at
100% load. The waveform is the superposition of a purely
resistive component and a purely inductive component.
It was measured using two scope probes and waveform
math to obtain a differential measurement. Based on
additional measurements of the inductor ripple current

LTC3829IUHF#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 3-Phase, Synchronous Regulators with Diffamp
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