TJA1080A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 28 November 2012 25 of 49
NXP Semiconductors
TJA1080A
FlexRay transceiver
6.8 TRXD collision
A TRXD collision is detected when both TRXD lines are LOW for more than the TRXD
collision detection time (t
det(col)(TRXD)
) in star configuration.
6.9 Status register
The status register can be read out on pin ERRN by using pin EN as clock; the status bits
are given in Table 10
. The timing diagram is illustrated in Figure 11.
The status register is accessible if:
UV
VIO
flag is not set and the voltage on pin V
IO
is between 4.75 V and 5.25 V
UV
VCC
flag is not set and the voltage on pin V
IO
is between 2.2 V and 4.75 V
After reading the status register, if no edge is detected on pin EN for longer than t
det(EN)
,
the status bits (S4 to S12) will be cleared if the corresponding flag has been reset. Pin
ERRN is LOW if the corresponding status bit is set.
Table 10. Status bits
Bit number Status bit Description
S0 LOCAL WAKEUP local wake-up source flag is redirected to this bit
S1 REMOTE WAKEUP remote wake-up source flag is redirected to this bit
S2 NODE CONFIG node configuration flag is redirected to this bit
S3 PWON status bit set means PWON flag has been set previously
S4 BUS ERROR status bit set means bus error flag has been set previously
S5 TEMP HIGH status bit set means temperature high flag has been set previously
S6 TEMP MEDIUM status bit set means temperature medium flag has been set previously
S7 TXEN_BGE CLAMPED status bit set means TXEN_BGE clamped flag has been set previously
S8 UVVBAT status bit set means UV
VBAT
flag has been set previously
S9 UVVCC status bit set means UV
VCC
flag has been set previously
S10 UVVIO status bit set means UV
VIO
flag has been set previously
S11 STAR LOCKED status bit is set if Star-locked mode has been entered previously
S12 TRXD COLLISION status bit is set if a TRXD collision has been detected previously
TJA1080A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 28 November 2012 26 of 49
NXP Semiconductors
TJA1080A
FlexRay transceiver
Fig 11. Timing diagram for status bits
001aag896
S0 S1 S2
T
EN
t
det(EN)
t
d(EN-ERRN)
receive
onlynormal
STBN
EN
ERRN
0.7V
IO
0.7V
IO
0.7V
IO
0.3V
IO
TJA1080A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 28 November 2012 27 of 49
NXP Semiconductors
TJA1080A
FlexRay transceiver
7. Limiting values
[1] According to ISO7637, test pulse 1, class C; verified by an external test house.
[2] According to ISO7637, test pulse 2a, class C; verified by an external test house.
[3] According to ISO7637, test pulse 3a, class C; verified by an external test house.
[4] According to ISO7637, test pulse 3b, class C; verified by an external test house.
[5] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature T
vj
is: T
vj
= T
amb
+ P R
th(j-a)
, where R
th(j-a)
is a
fixed value to be used for the calculation of T
vj
. The rating for T
vj
limits the allowable combinations of power dissipation (P) and ambient
temperature (T
amb
).
Table 11. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.
Symbol Parameter Conditions Min Max Unit
V
BAT
battery supply voltage no time limit 0.3 +60 V
V
CC
supply voltage no time limit 0.3 +5.5 V
V
BUF
supply voltage on pin V
BUF
no time limit 0.3 +5.5 V
V
IO
supply voltage on pin V
IO
no time limit 0.3 +5.5 V
V
INH1
voltage on pin INH1 0.3 V
BAT
+ 0.3 V
I
O(INH1)
output current on pin INH1 no time limit 1- mA
V
INH2
voltage on pin INH2 0.3 V
BAT
+ 0.3 V
I
O(INH2)
output current on pin INH2 no time limit 1- mA
V
WAKE
voltage on pin WAKE 0.3 V
BAT
+ 0.3 V
I
o(WAKE)
output current on pin WAKE pin GND not connected 15 - mA
V
BGE
voltage on pin BGE no time limit 0.3 +5.5 V
V
TXEN
voltage on pin TXEN no time limit 0.3 +5.5 V
V
TXD
voltage on pin TXD no time limit 0.3 +5.5 V
V
ERRN
voltage on pin ERRN no time limit 0.3 V
IO
+ 0.3 V
V
RXD
voltage on pin RXD no time limit 0.3 V
IO
+ 0.3 V
V
RXEN
voltage on pin RXEN no time limit 0.3 V
IO
+ 0.3 V
V
EN
voltage on pin EN no time limit 0.3 +5.5 V
V
STBN
voltage on pin STBN no time limit 0.3 +5.5 V
V
TRXD0
voltage on pin TRXD0 no time limit 0.3 +5.5 V
V
TRXD1
voltage on pin TRXD1 no time limit 0.3 +5.5 V
V
BP
voltage on pin BP no time limit 60 +60 V
V
BM
voltage on pin BM no time limit 60 +60 V
V
trt
transient voltage on pins BM and BP
[1]
100 - V
[2]
-75 V
[3]
150 - V
[4]
-100 V
T
stg
storage temperature 55 +150 C
T
vj
virtual junction temperature
[5]
40 +150 C
V
ESD
electrostatic discharge voltage HBM on pins BP and BM to ground
[6]
8.0 +8.0 kV
HBM at any other pin
[6]
4.0 +4.0 kV
MM on all pins
[7]
200 +200 V
CDM on all pins
[8]
1000 +1000 V

TJA1080ATS/2/T,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Interface - Specialized FLEXRAY TRANSCEIVER
Lifecycle:
New from this manufacturer.
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