© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 3
1 Publication Order Number:
NCP6915/D
NCP6915
6 Channels PMIC with One
DCDC Converter and 5
LDOs
The NCP6915 integrated circuit is part of the ON Semiconductor
mini power management IC family. It is optimized to supply battery
powered portable application sub−systems such as camera function,
microprocessors ... etc. This device integrates one high efficiency
600 mA Step−down DCDC converter with DVS (Dynamic Voltage
Scaling) and 5 low dropout (LDO) voltage regulators in WLCSP16
package.
Features
One DCDC Converter:
Peak Efficiency 96%
Programmable Output Voltage from 0.8 V to 2.3 V by 50 mV Steps
600 mA Output Current Capability
Five Low Noise − Low Dropout Regulators
Programmable Output Voltage from 1.7 V to 3.3 V for LDOs
1,2,3
Programmable Output Voltage from 1.2 V to 2.85 V for LDO 4 & 5
200 mA Output Current Capability: LDO’s 1,2,3 & 4
300 mA Output Current Capability: LDO 5
45 mVrms Low Output Noise
Control
400 kHz / 3.4 MHz I
2
C Control Interface
Hardware Enable Pin
Customizable Power up Sequencer
Extended Input Voltage Range 2.5 V to 5.5 V
Support of Newest Battery Technologies
Optimized Power Efficiency
82 mA Very Low Quiescent Current at no Load
Dynamic Voltage Scaling on DCDC Converter
Regulators can be Supplied from DCDC Converter Output
Small footprint
Package WLCSP16 1.56 x 1.56 mm
2
DCDC Converter runs at 3.0 MHz using a 1 mH Inductor and
10 mF Capacitor or 2.2 mH Inductor and 4.7 mF Capacitor
This is a Pb−Free Device
Typical Applications
Cellular Phones
Digital Cameras
Personal Digital Assistant and Portable Media Player
GPS
WLCSP16
CASE 567GF
MARKING
DIAGRAM*
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See detailed ordering and shipping information on page 23 o
f
this data sheet.
ORDERING INFORMATION
A
B
C
D
1234
VOUT2
VIN1
AGND
VOUT3
VOUT1
SCL
VBG
VOUT4
FB
HWEN
SDA
VIN2
PVIN
SW
PGND
VOUT5
(Top View)
A = Assembly Location
L = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Package
6915A
ALYWW
G
*Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
NCP6915
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2
Enabling
System Supply
DCDC1 Out
2.2uF
10uF
1uH
1.0uF
NCP6915
FB
PVIN
SW
PGND
Power Up/
Down
Sequencer
Thermal
Protection
SDA
SCL
HWEN
DCDC1
600 mA
100 nF
Core
AGND
VBG
VIN1
VIN2
1uF
System Supply
System Supply
Or
DCDC Out
VOUT1
LDO1
200 mA
1.0uF
VOUT2
LDO2
200 mA
1.0uF
VOUT3
LDO3
200 mA
1.0uF
VOUT4
LDO4
200 mA
1.0uF
VOUT5
LDO5
300 mA
1uF
Figure 1. Functional Block Diagram
Processor I
2
C
I
2
C
NCP6915
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3
Table 1. PIN OUT DESCRIPTION
Pin Name Type Description
POWER
B1
VIN1 Power Input
Analog Supply. This pin is the device analog, digital and LDO 1, 2 & 3 supply. A 1.0 mF ceramic
capacitor or larger must bypass this input to ground. This capacitor should be placed as close a
possible to this pin.
C2 VBG Analog Input
Reference Voltage. A 0.1 mF ceramic capacitor must bypass this pin to the ground
C1 AGND Analog
Ground
Analog Ground. Analog and digital modules ground. Must be connected to the system ground.
CONTROL AND SERIAL INTERFACE
B3
HWEN Digital Input Hardware Enable. Active high will enable the part; there is internal pull down resistor on this pin.
B2 SCL Digital Input I
2
C interface Clock
C3 SDA Digital
Input/Output
I
2
C interface Data
DCDC CONVERTER
A4
PVIN Power Input
DCDC Power Supply. This pin must be decoupled to ground by a 2.2 mF ceramic capacitor. This
capacitor should be placed as close a possible to this pin.
B4 SW Power Output DCDC Switch Power pin connects power transistors to one end of the inductor. Typical
application uses 1.0 mH inductor; refer to application section for more information.
A3 FB Analog Input DCDC Feedback Voltage. Must be connected to the output capacitor. This is the input to the error
amplifier.
C4 PGND Power
Ground
DCDC Power Ground. This pin is the power ground and carries the high switching current. High
quality ground must be provided to prevent noise spikes. To avoid high−density current flow in a
limited PCB track, a local ground plane is recommended.
LDO REGULATORS
B1
VIN1 Power Input LDO 1,2 & 3 Power and Core supply (see Power table)
D3 VIN2 Power Input
LDO 4&5 Power Supply This pin requires a 1 mF decoupling capacitor.
A2 VOUT1 Power Output
LDO 1 Output Power. This pin requires a 1 mF decoupling capacitor.
A1 VOUT2 Power Output
LDO 2 Output Power. This pin requires a 1 mF decoupling capacitor.
D1 VOUT3 Power Output
LDO 3 Output Power. This pin requires a 1 mF decoupling capacitor.
D2 VOUT4 Power Output
LDO 4 Output Power. This pin requires a 1 mF decoupling capacitor.
D4 VOUT5 Power Output
LDO 5 Output Power. This pin requires a 1 mF decoupling capacitor.
Table 2. MAXIMUM RATINGS
Rating
Symbol Value Unit
Analog and power pins: AVIN, PVIN, SW, VIN1, VIN2, VOUT1, VOUT2, VOUT3,
VOUT4, VOUT5, FB, VBG Pins
V
A
−0.3 to +6.0 V
Digital pins: SCL, SDA, HWEN Pin:
Input Voltage
Input Current
V
DG
I
DG
−0.3 to V
A
+0.3 6.0
10
V
mA
Storage Temperature Range T
STG
−65 to + 150 °C
Maximum Junction Temperature T
JMAX
−40 to +150 °C
Moisture Sensitivity (Note 1) MSL Level 1
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A.

NCP6915AFCCLT1G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators USR 1DCDC 5LDO
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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