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LTM4632EV#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28
LTM4632
1
4632fb
For more information www.linear.com/LTM4632
TYPICAL APPLICATION
FEATURES DESCRIPTION
Ultrathin, Triple Output,
Step-Down µModule Regulator
for DDR-QDR4 Memory
The LT M
®
4632 is an ultrathin triple output step-down
µModule
®
(power module) regulator to provide complete
power solution for DDR-QDR4 SRAM. Operating from a
3.6V to 15V input voltage, the LTM4632 supports two ±3A
output rails, both sink and source capable, for VDDQ and
VTT, plus a 10mA low noise reference VTTR output. Both
VTT and VTTR track and are equal to VDDQ/2. Housed
in a 6.25mm × 6.25mm × 1.82mm LGA and 6.25mm ×
6.25mm × 2.42mm BGA packages, the LTM4632 includes
the switching controller, power FETs, inductors and support
components. Alternatively, the power module can also be
configured as a two phase single ±6A output VTT. Only
a few ceramic input and output capacitors are needed to
complete the design.
The LTM4632 supports selectable Burst Mode operation
(CH1 only) and output voltage tracking for supply rail se
-
quencing. Its high switching frequency and current mode
control enable a very fast transient response to line and
load changes without sacrificing stability.
Fault protection features include overvoltage input, over-
current and overtemperature protection.
The LTM4632 is RoHS compliant with Pb-free finish.
QDR4 Memory Power µModule Regulator
Output Efficiency vs Load Current
n
Complete DDR-QDR4 SRAM Power Solution
Including VDDQ, VTT, VTTR (or VREF)
n
Solution in 0.5cm
2
(Dual-Sided PCB)
n
Wide Input Voltage Range: 3.6V to 15V
n
3.3V Input Compatible with V
IN
Tied to INTV
CC
n
0.6V to 2.5V Output Voltage Range
n
Dual ±3A DC Output Current with Sink and Source
Capability
n
±1.5%, ±10mA Buffered VTTR = VDDQ/2 Output
n
3A VDDQ + 3A VTT or Dual Phase Single 6A VTT
n
±1.5% Maximum Total Output Voltage Regulation
Error Over Load, Line and Temperature
n
Current Mode Control, Fast Transient Response
n
External Frequency Synchronization
n
Multiphase Parallelable with Current Sharing
n
Selectable Burst Mode
®
Operation
n
Overvoltage Input and Overtemperature Protection
n
Power Good Indicator
n
Ultrathin 6.25mm × 6.25mm × 1.82mm LGA and
6.25mm × 6.25mm × 2.42mm BGA Packages
L, LT , LT C , LT M , µModule, Burst Mode, Linear Technology and the Linear logo are registered
trademarks of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
52.3k
VDDQ
4632 TA01a
10µF
25V
V
IN
3.6V TO 15V
VDDQ
1.3V, 3A
22µF
4V
22µF
4V
V
OUT1
VTT
0.65V, ±3A
VTTR
0.65V, 10mA
V
OUT2
COMP1
VTTR
FB1
GND
LTM4632
PGOOD1 PGOOD2
V
IN
RUN1
RUN2
INTV
CC
SYNC/MODE
TRACK/SS1
V
DDQIN
COMP2
LOAD CURRENT (A)
0
65
EFFICIENCY (%)
90
80
75
70
85
95
2 31
4632 TA01b
12V INPUT
5V INPUT
APPLICATIONS
n
DDR Memory Power Supply
n
General Purpose Point of Load Conversion
n
Telecom, Networking and Industrial Equipment
LTM4632
2
4632fb
For more information www.linear.com/LTM4632
PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS
V
IN
............................................................. –0.3V to 16V
V
OUT
............................................................. –0.3V to 6V
PGOOD1, PGOOD2 ..................................... –0.3V to 16V
RUN1, RUN2 ...................................... –0.3V to V
IN
+0.3V
INTV
CC
, TRACK/SS1, V
DDQIN
, VTTR ......... –0.3V to 3.6V
MODE/SYNC, COMP1, COMP2,
FB1, FB2 ................................................–0.3V to INTV
CC
Operating Internal Temperature Range
(Notes 2, 3, 5) ............................................ –40 to 125°C
Storage Temperature Range ...................... –55 to 125°C
Peak Solder Reflow Body Temperature ................. 260°C
(Note 1)
LGA PACKAGE 25-LEAD (6.25mm
× 6.25mm × 1.82mm)
BGA PACKAGE 25-LEAD (6.25mm × 6.25mm × 2.42mm)
TOP VIEW
COMP2
SYNC/
MODE
GND
V
OUT1
FB1
PGOOD1
TRACK/SS1
A
5
1
2
3
4
PGOOD2
V
DDQIN
VTTR
INTV
CC
RUN2
B C D E
COMP1GND GND
RUN1
GND
V
IN
V
IN
V
IN
V
IN
V
OUT2
T
JMAX
= 125°C, θ
JCtop
= 17°C/W, θ
JCbottom
= 11°C/W,
θ
JB
+θ
BA
= 22°C/W, θ
JA
= 20°C/W
WEIGHT = 0.21g
(See Pin Functions, Pin Configuration Table)
PART NUMBER PAD OR BALL FINISH
PART MARKING*
PACKAGE
TYPE
MSL
RATING
TEMPERATURE RANGE
(SEE NOTE 2)DEVICE FINISH CODE
LTM4632EV#PBF Au (RoHS) LTM4632V e4 LGA 3 –40°C to 125°C
LTM4632IV#PBF Au (RoHS) LTM4632V e4 LGA 3 –40°C to 125°C
LTM4632EY#PBF SAC305 (RoHS) LTM4632Y e1 BGA 3 –40°C to 125°C
LTM4632IY#PBF SAC305 (RoHS) LTM4632Y e1 BGA 3 –40°C to 125°C
LTM4632IY SnPb (63/37) LTM4632Y e0 BGA 3 –40°C to 125°C
• Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is indicated by a label on the shipping
container. Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Terminal Finish Part Marking: www.linear.com/leadfree
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures: www.linear.com/umodule/pcbassembly
• LGA and BGA Package and Tray Drawings: www.linear.com/packaging
ORDER INFORMATION
http://www.linear.com/product/LTM4632#orderinfo
LTM4632
3
4632fb
For more information www.linear.com/LTM4632
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IN
Input DC Voltage
l
3.6 15 V
V
IN_3.3
3.3V Input DC Voltage V
IN
= INTV
CC
l
3.1 3.3 3.5 V
V
OUT1(RANGE)
V
OUT2(RANGE)
Output Voltage Range V
IN
= 3.6V to 15V
l
l
0.6 2.5
1.8
V
V
Output Specification (Channel 1)
V
OUT1
(DC) CH1 Output Voltage, Total Variation
with Line and Load
C
IN
= 22µF, C
OUT
= 100µF Ceramic
R
FB1
= 51.7k, MODE = GND, I
OUT
= –3A to 3A
l
1.28 1.30 1.32 V
I
OUT1
(DC) CH1 Output Continuous Current
Range
V
IN
= 12V, V
OUT1
= 1.3V (Note 3) –3 3 A
IQ1(V
IN
) CH1 Input Supply Bias Current V
IN
= 12V, V
OUT1
= 1.3V, MODE = GND
V
IN
= 12V, V
OUT1
= 1.3V, MODE = INTV
CC
Shutdown, RUN1 = GND
13
400
40
mA
µA
µA
IS1(V
IN
) CH1 Input Supply Current V
IN
= 12V, V
OUT1
= 1.3V, I
OUT
= 3A 0.4 A
ΔV
OUT1
(Line)/V
OUT1
CH1 Line Regulation Accuracy V
OUT1
= 1.3V, V
IN
= 3.6V to 15V, I
OUT1
= 0A
l
0.01 0.05 %/V
ΔV
OUT1
(Load)/V
OUT1
CH1 Load Regulation Accuracy V
OUT1
= 1.3V, I
OUT
= –3A to 3A
l
0.2 1.0 %
V
OUT1
(AC) CH1 Output Ripple Voltage I
OUT
= 0A, C
OUT
= 47µF Ceramic
V
IN
= 12V, V
OUT1
= 1.3V
30 mV
ΔV
OUT1
(START) CH1 Turn-On Overshoot I
OUT
= 0A, C
OUT
= 47µF Ceramic,
TRACK/SS1 = –0.1µF, V
IN
= 12V, V
OUT1
= 1.3V
30 mV
t
START
Turn-On Time C
OUT
= 100µF Ceramic, TRACK/SS1 = 0.01µF
No Load, V
IN
= 12V, V
OUT1
= 1.3V
1.2 ms
ΔV
OUTLS1
CH1 Peak Deviation for Dynamic
Load
Load: 0% to 25% to 0% of Full Load
C
OUT
= 47µF Ceramic, V
IN
= 12V, V
OUT1
= 1.3V
85 mV
t
SETTLE1
CH1 Settling Time for Dynamic
Load Step
Load: 0% to 25% to 0% of Full Load
C
OUT
= 47µF Ceramic, V
IN
= 12V, V
OUT1
= 1.3V
20 µs
IOUTPK1 CH1 Output Current Limit V
IN
= 12V, V
OUT1
= 1.3V 4.5 A
Output Specification (Channel 2)
V
OUT2
(DC) CH2 Output Voltage, Total Variation
with Line and Load
C
IN
= 22µF, C
OUT
= 100µF Ceramic
V
DDQIN
= 1.3V, MODE = GND, I
OUT
= –3A to 3A
l
637 650 663 mV
I
OUT2
(DC) CH2 Output Continuous Current
Range
V
IN
= 12V, V
DDQIN
= 1.3V (Note 3) –3 3 A
IQ2(V
IN
) CH2 Input Supply Bias Current V
IN
= 12V, V
DDQIN
= 1.3V, MODE = GND
Shutdown, RUN2 = 0
7
40
mA
µA
IS2(V
IN
) CH2 Input Supply Current V
IN
= 12V, V
DDQIN
= 1.3V, I
OUT
= 3A 0.25 A
ΔV
OUT2
(Line)/V
OUT2
CH2 Line Regulation Accuracy V
DDQIN
= 1.3V, V
IN
= 3.6V to 15V, I
OUT2
= 0A
l
0.01 0.05 %/V
ΔV
OUT2
(Load)/V
OUT2
CH2 Load Regulation Accuracy V
DDQIN
= 1.3V, I
OUT
= –3A to 3A
l
0.2 1.0 %
V
OUT2
(AC) CH2 Output Ripple Voltage I
OUT
= 0A, C
OUT
= 100µF Ceramic
V
IN
= 12V, V
DDQIN
= 1.3V
30 mV
ΔV
OUTLS2
CH2 Peak Deviation for Dynamic
Load
Load: 0% to 25% to 0% of Full Load
C
OUT
= 47µF Ceramic, V
IN
= 12V, V
OUT1
= 1.3V
85 mV
t
SETTLE2
CH2 Settling Time for Dynamic
Load Step
Load: 0% to 25% to 0% of Full Load
C
OUT
= 47µF Ceramic, V
IN
= 12V, V
OUT1
= 1.3V
20 µs
IOUTPK2 CH2 Output Current Limit 4.5 A
The l denotes the specifications that apply over the specified internal
operating temperature range (Note 2). Specified as each individual output channel at T
A
= 25°C (Note 2), V
IN
= 12V, unless otherwise
noted, per the typical application in Figure 19
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LTM4632EV#PBF

Mfr. #:
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Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Ultrathin, Triple Module Regulator for QDR-DDR SRAM
Lifecycle:
New from this manufacturer.
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