Stereo PDM-to-I
2
S or
TDM Conversion IC
Data Sheet
ADAU7002
Rev. B Document Feedbac
k
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FEATURES
64× decimation of a stereo pulse density modulation (PDM)
bit stream to pulse code modulation (PCM) audio data
Slave I
2
S or time division multiplexed (TDM) output interface
Configurable TDM slots
I/O supply operation: 1.62 V to 3.6 V
64× output sample rate PDM clock
64×/128×/192×/256×/384×/512× output sample rate BCLK
Automatic BCLK ratio detection
Output sample rate: 4 kHz to 96 kHz
Automatic PDM CLK drive at 64× the sample rate
Automatic power down with BCLK removal
0.67 mA operating current at 48 kHz and 1.8 V IOVDD supply
Shutdown current: <1 μA
8-ball, 1.56 mm × 0.76 mm, 0.4 mm pitch WLCSP
Power-on reset
APPLICATIONS
Mobile computing
Portable electronics
Consumer electronics
GENERAL DESCRIPTION
The ADAU7002 converts a stereo PDM bit stream into a PCM
output. The source for the PDM data can be two microphones
or other PDM sources. The PCM audio data is output on a
serial audio interface port in either I
2
S or TDM format.
The ADAU7002 is specified over the commercial temperature
range (−40°C to +85°C). It is available in a halide-free, 8-ball,
1.56 mm × 0.76 mm, wafer level chip scale package (WLCSP).
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
PDM_CLK
CONFIG
GND
1.62
V
TO 3.6V
IOVDD
PDM_DAT
BCLK
LRCLK
SDATA
PDM
INPUT
PORT
DIGITAL
DECIMATION
FILTERING
ADAU7002
11265-001
I
2
S
OUTPUT
PORT
ADAU7002* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
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EVALUATION KITS
ADAU7002Z Evaluation Board
DOCUMENTATION
Data Sheet
ADAU7002: Stereo PDM-to-I
2
S or TDM Conversion IC Data
Sheet
User Guides
UG-533: Evaluating the ADAU7002 Using the EVAL-
ADAU7002Z
TOOLS AND SIMULATIONS
ADAU7002 IBIS Model
DESIGN RESOURCES
ADAU7002 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
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SAMPLE AND BUY
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ADAU7002 Data Sheet
Rev. B | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ..............................5
Typical Performance Characteristics ..............................................6
Typical Application Circuit ..............................................................8
Applications Information .................................................................9
Overview ........................................................................................9
Clocking ..........................................................................................9
Serial Audio Output Interface .....................................................9
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 13
REVISION HISTORY
11/2016—Rev. A to Rev. B
Change to Serial Port Timing Section and Time From BCLK
Falling Parameter; Table 7 ............................................................. 10
Changes to Figure 19 Caption and Figure 21 Caption .............. 12
7/2013—Rev. 0 to Rev. A
Changes to Supply Current Test Conditions/Comments ............ 3
Changes to Figure 5 .......................................................................... 6
Added Figure 6; Renumbered Sequentially ................................... 6
Changes to Figure 14 and Figure 15 ............................................ 10
Changes to Figure 16, Figure 17, and Figure 18 ......................... 11
Changes to Figure 19, Figure 20, and Figure 21 ......................... 12
1/2013—Revision 0: Initial Version

ADAU7002ACBZ-R7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Audio Sample Rate Converters PDM to I2S/TDM Conversion IC
Lifecycle:
New from this manufacturer.
Delivery:
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