4
1447F–PLD–11/08
ATF750LVC
8. Bus-friendly Pin-keeper Input and I/Os
All input and I/O pins on the ATF750LVC have programmable “pin-keeper” circuits. If acti-
vated, when any pin is driven high or low and then subsequently left floating, it will stay at that
previous high or low level.
This circuitry prevents unused input and I/O lines from floating to intermediate voltage levels,
which cause unnecessary power consumption and system noise. The keeper circuits elimi-
nate the need for external pull-up resistors and eliminate their DC power consumption.
Enabling or disabling of the pin-keeper circuits is controlled by the device type chosen in the
logic compiler device selection menu. Please refer to the software compiler table for more
details. Once the pin-keeper circuits are disabled, normal termination procedures are required
for unused inputs and I/Os.
9. Input Diagram
10. I/O Diagram
Table 1. Software Compiler Mode Selection
Synario WinCupl Pin-keeper Circuit
ATF750LVC V750C Disabled
ATF750LVC (PPK) V750CPPK Enabled
100K
V
CC
ESD
PROTECTION
CIRCUIT
INPUT
PROGRAMMABLE
OPTION
100K
V
CC
V
CC
DATA
OE
I/O
PROGRAMMABLE
OPTION
5
1447F–PLD–11/08
ATF750LVC
Notes: 1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec.
2. This test is performed at initial characterisation only.
12. Input Test Waveforms and Measurement Levels
t
R
, t
F
< 3 ns (10% to 90%)
13. Output Test Load
11. DC Characteristics
Symbol Parameter Condition Min Typ Max Units
V
CC
Power Supply
Voltage
3V Operation 3.0 3.3 3.6 V
5V Operation
Com. 4.75 5.0 5.25 V
Ind. 4.5 5.0 5.5 V
I
LI
Input Load Current V
IN
= -0.1V to V
CC
+ 1V 10 µA
I
LO
Output Leakage
Current
V
OUT
= -0.1V to V
CC
+ 0.1V 10 µA
I
CC
Power Supply
Current, Standby
V
CC
= 3.6V
V
IN
= 3.6V
Outputs Open
C-15
Com. 65 90 mA
Ind. 70 100 mA
I
CC
Power Supply
Current, Standby
V
CC
= 5.25V
V
IN
= 5.25V
Outputs Open
C-15
Com. 100 180 mA
Ind. 110 190 mA
I
OS
(1)(2)
Output Short
Circuit Current
V
OUT
= 0.5V -120 mA
V
IL
Input Low Voltage Min V
CC
Max -0.6 0.8 V
V
IH
Input High Voltage 2.0
V
CC
+
0.75
V
V
OL
Output Low
Voltage
V
IN
= V
IH
or V
IL
,
V
CC
= Min
I
OL
= 16 mA Com., Ind. 0.5 V
I
OL
= 12 mA Mil. 0.5 V
I
OL
= 24 mA Com. 0.8 V
V
OH
Output High
Voltage
V
IN
= V
IH
or V
IL
,
V
CC
= Min
I
OH
= -100 µA VCC - 0.3V V
I
OH
= -2.0 mA 2.4 V
6
1447F–PLD–11/08
ATF750LVC
14. AC Waveforms, Product Term Clock
(1)
Note: 1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise specified.
Note: 1. See ordering information for valid part numbers.
15. AC Characteristics, Product Term Clock
(1)
Symbol Parameter
-15 (5V Operation) -15 (3V Operation)
UnitsMin Max Min Max
t
PD
Input or Feedback to Non-registered Output 10 15 ns
t
EA
Input to Output Enable 10 15 ns
t
ER
Input to Output Disable 10 15 ns
t
CO
Clock to Output 4 10 5 12 ns
t
CF
Clock to Feedback 4 7.5 5 9 ns
t
S
Input Setup Time 4 8 ns
t
SF
Feedback Setup Time 4 7 ns
t
H
Hold Time 2 5 ns
t
P
Clock Period 11 14 ns
t
W
Clock Width 5.5 7 ns
f
MAX
External Feedback 1/(t
S
+ t
CO
)7150MHz
Internal Feedback 1/(t
SF
+ t
CF
)8662MHz
No Feedback 1/(t
P
)9071MHz
t
AW
Asynchronous Reset Width 10 15 ns
t
AR
Asynchronous Reset Recovery Time 10 15 ns
t
AP
Asynchronous Reset to Registered Output Reset 12 15 ns
t
SP
Setup Time, Synchronous Preset 7 8 ns

ATF750LVC-15XU

Mfr. #:
Manufacturer:
Microchip Technology / Atmel
Description:
CPLD - Complex Programmable Logic Devices 750 GATE LOW POWER - 15NS
Lifecycle:
New from this manufacturer.
Delivery:
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