13
3368J–SEEPR–06/07
AT25128A_256A
Figure 4-3. WRDI Timing
Figure 4-4. RDSR Timing
Figure 4-5. WRSR Timing
CS
SCK
01234567891011121314
SI
INSTRUCTION
SO
76543210
DATA OUT
MSB
HIGH IMPEDANCE
15
14
3368J–SEEPR–06/07
AT25128A_256A
Figure 4-6. READ Timing
Figure 4-7. WRITE Timing
Figure 4-8. HOLD Timing
SO
SCK
HOLD
t
CD
t
HD
t
HZ
t
LZ
t
CD
t
HD
CS
15
3368J–SEEPR–06/07
AT25128A_256A
Notes: 1. For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC Characteristics
tables.
2. “U” designates Green package + RoHS compliant.
3. Available in waffle pack and wafer form; order as SL788 for wafer form. Bumped die available upon request. Please Contact
Serial Interface Marketing.
5. AT25128A Ordering Information
(1)
Ordering Code Package Operation Range
AT25128A-10PU-2.7
(2)
AT25128A-10PU-1.8
(2)
AT25128AN-10SU-2.7
(2)
AT25128AN-10SU-1.8
(2)
AT25128AW-10SU-2.7
(2)
AT25128AW-10SU-1.8
(2)
AT25128A-10TU-2.7
(2)
AT25128A-10TU-1.8
(2)
AT25128AU2-10UU-1.8
(2)
AT25128AY7-10YH-1.8
(2)
8P3
8P3
8S1
8S1
8S2
8S2
8A2
8A2
8U2-1
8Y7
Lead-free/Halogen-free/
Industrial Temperature
(40Cto85C)
AT25128A-W1.8-11
(3)
Die Sale
Industrial Temperature
(40Cto85C)
Package Type
8P3 8-lead, 0.300" Wide, Plastic Dual In-line Package (PDIP)
8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC)
8S2 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline Package (EIAJ SOIC)
8U2-1 8-ball, die Ball Grid Array Package (dBGA2)
8A2 8-lead, 4.4 mm Body, Thin Shrink Small Outline Package (TSSOP)
8Y7 8-lead, 6.00 mm x 4.90 mm Body, Ultra Thin, Dual Footprint, Non-leaded, Small Array Package (SAP)
Options
2.7 Low-voltage (2.7V to 5.5V)
1.8 Low-voltage (1.8V to 5.5V)

AT25128A-10PU-1.8

Mfr. #:
Manufacturer:
Description:
IC EEPROM 128K SPI 20MHZ 8DIP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union