Data Sheet D18688EJ3V0DS
2
NP50P04KDG
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Zero Gate Voltage Drain Current IDSS VDS = −40 V, VGS = 0 V −10
μ
A
Gate Leakage Current IGSS VGS = m20 V, VDS = 0 V m100 nA
Gate to Source Threshold Voltage VGS(th) VDS = −10 V, ID = −1 mA −1.0 −1.6 −2.5 V
Forward Transfer Admittance
Note
| y
fs | VDS = −10 V, ID = −25 A 15 30 S
Drain to Source On-state Resistance
Note
R
DS(on)1 VGS = −10 V, ID = −25 A 7.9 10 mΩ
RDS(on)2 VGS = −4.5 V, ID = −25 A 9.8 15 mΩ
Input Capacitance Ciss VDS = −10 V, 5100 pF
Output Capacitance Coss VGS = 0 V, 790 pF
Reverse Transfer Capacitance Crss f = 1 MHz 440 pF
Turn-on Delay Time td(on) VDD = −20 V, ID = −25 A, 20 ns
Rise Time tr VGS = −10 V, 45 ns
Turn-off Delay Time td(off) RG = 0 Ω 405 ns
Fall Time tf 230 ns
Total Gate Charge QG VDD = −32 V, 100 nC
Gate to Source Charge QGS VGS = −10 V, 13 nC
Gate to Drain Charge QGD ID = −50 A 42 nC
Body Diode Forward Voltage
Note
V
F(S-D) IF = −50 A, VGS = 0 V 0.95 1.5 V
Reverse Recovery Time trr IF = −50 A, VGS = 0 V, 48 ns
Reverse Recovery Charge Qrr di/dt = −100 A/
μ
s 66 nC
Note Pulsed test PW ≤ 350
μ
s, Duty Cycle ≤ 2%
TEST CIRCUIT 1 AVALANCHE CAPABILITY
R
G
= 25 Ω
50 Ω
L
V
DD
V
GS
= −20 → 0 V
BV
DSS
I
AS
I
D
V
DS
Starting T
ch
V
DD
D.U.T.
TEST CIRCUIT 3 GATE CHARGE
TEST CIRCUIT 2 SWITCHING TIME
PG.
R
G
0
V
GS
(−)
D.U.T.
R
L
V
DD
τ = 1 s
μ
Duty Cycle ≤ 1%
V
GS
Wave Form
V
DS
Wave Form
V
GS
(−)
10%
90%
V
GS
10%
0
V
DS
(−)
90%90%
t
d(on)
t
r
t
d(off)
t
f
10%
τ
V
DS
0
t
on
t
off
PG.
PG.
50 Ω
D.U.T.
R
L
V
DD
I
G
= −2 mA
−
