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LTC1598IG#PBF

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10
LTC1594/LTC1598
15948fb
APPLICATIONS INFORMATION
WUU
U
OVERVIEW
The LTC1594/LTC1598 are micropower, 12-bit sampling
A/D converters that feature a 4- and 8-channel multi-
plexer respectively. They typically draw only 320μA of
supply current when sampling at 16.8kHz. Supply cur-
rent drops linearly as the sample rate is reduced (see
Supply Current vs Sample Rate). The ADCs automatically
power down when not performing conversions, drawing
only leakage current. The LTC1594 is available in a 16-pin
narrow SO package and the LTC1598 is packaged in a
24-pin SSOP. Both devices operate on a single supply
from 4.5V to 5.5V.
The LTC1594/LTC1598 contain a 12-bit, switched-
capacitor ADC, sample-and-hold, serial port and an
external reference input pin. In addition, the LTC1594 has
a 4-channel multiplexer and the LTC1598 provides an
8-channel multiplexer (see Block Diagram). They can
measure signals floating on a DC common mode voltage
and can operate with reduced spans to 1.5V. Reducing
the spans allow them to achieve 366μV resolution.
The LTC1594/LTC1598 provide separate MUX output
and ADC input pins to form an ideal MUXOUT/ADCIN
loop which economizes signal conditioning. The MUX
and ADC of the devices can also be controlled individually
through separate chip selects to enhance flexibility.
SERIAL INTERFACE
For this discussion we will assume that CSMUX and
CSADC are tied together and will refer to them as simply
CS, unless otherwise specified.
The LTC1594/LTC1598 communicate with the micropro-
cessor and other external circuitry via a synchronous,
half duplex, 4-wire interface (see Operating Sequences in
Figures 1 and 2).
CLK
EN D1
D2
CSMUX = CSADC = CS
t
CYC
B5
B6
B7
B8B9
B10B11
Hi-Z
D
OUT
CH0 TO
CH7
D
IN
t
CONV
Hi-Z
t
suCS
NULL
BIT
D0
B4
B3
B2 B1 B0*
t
SMPL
t
ON
DON’T CARE
ADCIN =
MUXOUT
COM = GND *AFTER COMPLETING THE DATA TRANSFER, IF FURTHER CLOCKS ARE APPLIED WITH CS LOW,
THE ADC WILL OUTPUT LSB-FIRST DATA THEN FOLLOWED WITH ZEROS INDEFINITELY
1594/98 F01
Figure 1. LTC1594/LTC1598 Operating Sequence Example: CH2, GND
11
LTC1594/LTC1598
15948fb
APPLICATIONS INFORMATION
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Figure 2. LTC1594/LTC1598 Operating Sequence Example: All Channels Off
CLK
EN D1
D2
t
CYC
Hi-Z
D
OUT
CH0 TO
CH7
D
IN
t
CONV
Hi-Z
t
suCS
NULL
BIT
D0
t
OFF
D0N‘T CARE
ADCIN =
MUXOUT
COM = GND
1594/98 F02
DUMMY CONVERSION
CSMUX = CSADC = CS
break-before-make interval, t
OPEN
. After a delay of t
ON
(t
OFF
+ t
OPEN
), the selected channel is switched on,
allowing the ADC in the chip to acquire input signal and
start the conversion (see Figures 1 and 2). After 1 null bit,
the result of the conversion is output on the D
OUT
line.
The selected channel remains on, until the next falling
edge of CS. At the end of the data exchange CS should be
brought high. This resets the LTC1594/LTC1598 and
initiates the next data exchange.
D
IN1
D
IN2
D
OUT1
D
OUT2
CS
SHIFT MUX
ADDRESS IN
t
SMPL
+ 1 NULL BIT
SHIFT A/D CONVERSION
RESULT OUT
1594/98 AI01
Break-Before-Make
The LTC1594/LTC1598 provide a break-before-make
interval from switching off all the channels simulta-
neously to switching on the next selected channel once
CS is pulled low. In other words, once CS is pulled low,
Data Transfer
The CLK synchronizes the data transfer with each bit
being transmitted on the falling CLK edge and captured
on the rising CLK edge in both transmitting and receiving
systems.
The LTC1594/LTC1598 first receive input data and then
transmit back the A/D conversion results (half duplex).
Because of the half duplex operation, D
IN
and D
OUT
may
be tied together allowing transmission over just 3 wires:
CS, CLK and DATA (D
IN
/D
OUT
).
Data transfer is initiated by a rising chip select (CS)
signal. After CS rises the input data on the D
IN
pin is
latched into a 4-bit register on the rising edge of the clock.
More than four input bits can be sent to the D
IN
pin
without problems, but only the last four bits clocked in
before CS falls will be stored into the 4-bit register. This
4-bit input data word will select the channel in the
multiplexer (see Input Data Word and Tables 1 and 2). To
ensure correct operation the CS must be pulled low
before the next rising edge of the clock.
Once the CS is pulled low, all channels are simulta-
neously switched off after a delay of t
OFF
to ensure a
12
LTC1594/LTC1598
15948fb
after a delay of t
OFF
, all the channels are switched off to
ensure a break-before-make interval. After this interval,
the selected channel is switched on allowing signal
transmission. The selected channel remains on until the
next falling edge of CS and the process repeats itself with
the “EN” bit being logic high. If the “EN” bit is logic low,
all the channels are switched off simultaneously after a
delay of t
OFF
from CS being pulled low and all the
channels remain off until the next falling edge of CS.
Input Data Word
When CS is high, the LTC1594/LTC1598 clock data into
the D
IN
inputs on the rising edge of the clock and store the
data into a 4-bit register. The input data words are defined
as follows:
D0EN D2 D1
CHANNEL SELECTION
1594/98 AI02
“EN” Bit
The first bit in the 4-bit register is an “EN” bit. If the “EN”
bit is a logic high, as illustrated in Figure 1, it enables the
selected channel after a delay of t
ON
when the CS is pulled
low. If the “EN” bit is logic low, as illustrated in Figure 2,
it disables all channels after a delay of t
OFF
when the CS
is pulled low.
Multiplexer (MUX) Address
The 3 bits of input word following the “EN” bit select the
channel in the MUX for the requested conversion. For a
given channel selection, the converter will measure the
voltage of the selected channel with respect to the voltage
on the COM pin. Tables 1 and 2 show the various bit
combinations for the LTC1594/LTC1598 channel selection.
Table 1. Logic Table for the LTC1594 Channel Selection
CHANNEL STATUS EN D2 D1 DO
All Off 0 X X X
CH0 1 0 0 0
CH1 1 0 0 1
CH2 1 0 1 0
CH3 1 0 1 1
APPLICATIONS INFORMATION
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Table 2. Logic Table for the LTC1598 Channel Selection
CHANNEL STATUS EN D2 D1 DO
All Off 0 X X X
CH0 1 0 0 0
CH1 1 0 0 1
CH2 1 0 1 0
CH3 1 0 1 1
CH4 1 1 0 0
CH5 1 1 0 1
CH6 1 1 1 0
CH7 1 1 1 1
Transfer Curve
The LTC1594/LTC1598 are permanently configured for
unipolar only. The input span and code assignment for
this conversion type is illustrated below.
Transfer Curve
0V
1LSB
V
REF
–2LSB
V
REF
4096
V
REF
–1LSB
V
REF
V
IN
0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 0
•
•
•
1594/98 • AI03
1LSB =
Output Code
OUTPUT CODE
•
•
•
1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0
INPUT VOLTAGE
V
REF
– 1LSB
V
REF
– 2LSB
•
•
•
1LSB
0V
INPUT VOLTAGE
(V
REF
= 5.000V)
4.99878V
4.99756V
•
•
•
0.00122V
0V
1594/98 • AI04
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LTC1598IG#PBF

Mfr. #:
Buy LTC1598IG#PBF
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 8-Ch, uP Smpl 12-B Serial I/O A/D Conv
Lifecycle:
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