7
LTC1594/LTC1598
15948fb
PIN FUNCTIONS
UUU
LTC1594
CH0 (Pin 1): Analog Multiplexer Input.
CH1 (Pin 2): Analog Multiplexer Input.
CH2 (Pin 3): Analog Multiplexer Input.
CH3 (Pin 4): Analog Multiplexer Input.
ADCIN (Pin 5): ADC Input. This input is the positive analog
input to the ADC. Connect this pin to MUXOUT for normal
operation.
V
REF
(Pin 6): Reference Input. The reference input defines
the span of the ADC.
COM (Pin 7): Negative Analog Input. This input is the
negative analog input to the ADC and must be free of noise
with respect to GND.
GND (Pin 8): Analog Ground. GND should be tied directly
to an analog ground plane.
CSADC (Pin 9): ADC Chip Select Input. A logic high on this
input powers down the ADC and three-states D
OUT
. A logic
low on this input enables the ADC to sample the selected
channel and start the conversion. For normal operation
drive this pin in parallel with CSMUX.
LTC1598
CH5 (Pin 1): Analog Multiplexer Input.
CH6 (Pin 2): Analog Multiplexer Input.
CH7 (Pin 3): Analog Multiplexer Input.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
CLK (Pin 5): Shift Clock. This clock synchronizes the serial
data transfer to both MUX and ADC. It also determines the
conversion speed of the ADC.
CSMUX (Pin 6): MUX Chip Select Input. A logic high on
this input allows the MUX to receive a channel address. A
logic low enables the selected MUX channel and connects
it to the MUXOUT pin for A/D conversion. For normal
operation, drive this pin in parallel with CSADC.
D
IN
(Pin 7): Digital Data Input. The multiplexer address is
shifted into this input.
D
OUT
(Pin 10): Digital Data Output. The A/D conversion
result is shifted out of this output.
V
CC
(Pin 11): Power Supply Voltage. This pin provides
power to the ADC. It must be bypassed directly to the
analog ground plane.
CLK (Pin 12): Shift Clock. This clock synchronizes the
serial data transfer to both MUX and ADC.
CSMUX (Pin 13): MUX Chip Select Input. A logic high on
this input allows the MUX to receive a channel address. A
logic low enables the selected MUX channel and connects
it to the MUXOUT pin for A/D conversion. For normal
operation, drive this pin in parallel with CSADC.
D
IN
(Pin 14): Digital Data Input. The multiplexer address
is shifted into this input.
MUXOUT (Pin 15): MUX Output. This pin is the output of
the multiplexer. Tie to ADCIN for normal operation.
V
CC
(Pin 16): Power Supply Voltage. This pin should be
tied to Pin 11.
COM (Pin 8): Negative Analog Input. This input is the
negative analog input to the ADC and must be free of noise
with respect to GND.
GND (Pin 9): Analog Ground. GND should be tied directly
to an analog ground plane.
CSADC (Pin 10): ADC Chip Select Input. A logic high on
this input deselects and powers down the ADC and three-
states D
OUT
. A logic low on this input enables the ADC to
sample the selected channel and start the conversion. For
normal operation drive this pin in parallel with CSMUX.
D
OUT
(Pin 11): Digital Data Output. The A/D conversion
result is shifted out of this output.
NC (Pin 12): No Connection.
NC (Pin 13): No Connection.
CLK (Pin 14): Shift Clock. This input should be tied to Pin 5.
8
LTC1594/LTC1598
15948fb
PIN FUNCTIONS
UUU
V
CC
(Pin 15): Power Supply Voltage. This pin provides
power to the A/D Converter. It must be bypassed directly
to the analog ground plane.
V
REF
(Pin 16): Reference Input. The reference input de-
fines the span of the ADC.
ADCIN (Pin 17): ADC Input. This input is the positive
analog input to the ADC. Connect this pin to MUXOUT for
normal operation.
MUXOUT (Pin 18): MUX Output. This pin is the output of
the multiplexer. Tie to ADCIN for normal operation.
V
CC
(Pin 19): Power Supply Voltage. This pin should be
tied to Pin 15.
CH0 (Pin 20): Analog Multiplexer Input.
CH1 (Pin 21): Analog Multiplexer Input.
CH2 (Pin 22): Analog Multiplexer Input.
CH3 (Pin 23): Analog Multiplexer Input.
CH4 (Pin 24): Analog Multiplexer Input.
TEST CIRCUITS
Voltage Waveforms for D
OUT
Rise and Fall Times, t
r
, t
f
Load Circuit for t
dDO
, t
r
and t
f
D
OUT
1.4V
3k
100pF
TEST POINT
1594/98 TC01
D
OUT
V
OL
V
OH
t
r
t
f
1594/98 TC02
1594/98 BD
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
20
21
22
23
24
1
2
3
+
8-CHANNEL
MUX
8 COM
GND
4, 9
10
6
5, 14
7
11
CSADC
CSMUX
CLK
D
IN
D
OUT
12
13
NC
NC
12-BIT
SAMPLING
ADC
ADCINMUXOUT
18 17 16 15, 19
V
REF
V
CC
CH0
CH1
CH2
CH3
1
2
3
4
+
4-CHANNEL
MUX
7 COM
GND
8
9
13
12
14
10
CSADC
CSMUX
CLK
D
IN
D
OUT
12-BIT
SAMPLING
ADC
ADCINMUXOUT
15 5 6 16
V
REF
V
CC
LTC1594
LTC1598
BLOCK DIAGRA S
W
LTC1594
LTC1598
9
LTC1594/LTC1598
15948fb
TEST CIRCUITS
Voltage Waveforms for t
en
Voltage Waveforms for D
OUT
Delay Times, t
dDO
CSMUX
= CSADC
= CS
CLK
D
OUT
MPU
RECEIVED
WORD
1594/98 TA03
B3B7 B6 B5 B4 B2 B1 B0 B1 B2B11 B10 B9 B8
D
IN
MPU
TRANSMIT
WORD
BYTE 3
BYTE 2
EN D20D1
X
D0
BYTE 1
X
X
X
X
X
X
X
000
X
X
X
XX
X
X
X
BYTE 3
BYTE 2
BYTE 1
B10
?
?
0
B11
B9
B7
B8
B6
B5
B3
B4 B2
B1
B1
B0
DON‘T CARE
D1D2
???
?????
DO
EN
1594/98 TC06
CSADC
LTC1594/LTC1598
1
CLK
D
OUT
t
en
B11
V
OL
2
D
OUT
WAVEFORM 1
(SEE NOTE 1)
V
IH
t
dis
90%
10%
D
OUT
WAVEFORM 2
(SEE NOTE 2)
CSADC = CSMUX = CS
NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH
THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL.
NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH
THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL.
1594/98 TC05
Load Circuit for t
dis
and t
en
D
OUT
3k
100pF
TEST POINT
V
CC
t
dis
WAVEFORM 2, t
en
t
dis
WAVEFORM 1
1594/98 TC04
Voltage Waveforms for t
dis

LTC1598IG#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 8-Ch, uP Smpl 12-B Serial I/O A/D Conv
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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