Data Sheet ADN2815
Rev. C | Page 5 of 24
OUTPUT AND TIMING SPECIFICATIONS
Table 3.
Parameter Conditions Min Typ Max Unit
LVDS OUTPUT CHARACTERISTICS
(CLKOUTP/CLKOUTN, DATAOUTP/DATAOUTN)
Output Voltage High V
OH
(see Figure 3), 655 Mb/s 1475 mV
Output Voltage Low V
OL
(see Figure 3), 655 Mb/s 925 mV
Differential Output Swing V
OD
(see Figure 3), 655 Mb/s 250 320 400 mV
Differential Output Swing V
OD
(see Figure 3), 1.25 Gb/s 240 300 400 mV
Output Offset Voltage V
OS
(see Figure 3) 1125 1200 1275 mV
Output Impedance Differential 100 Ω
LVDS Outputs Timing
Rise Time 20% to 80% 115 220 ps
Fall Time 80% to 20% 115 220 ps
Setup Time T
S
(see Figure 2), GbE 360 400 440 ps
Hold Time T
H
(see Figure 2), GbE 360 400 440 ps
I
2
C INTERFACE DC CHARACTERISTICS LVCMOS
IH
Input Low Voltage V
IL
0.3 VCC V
Input Current V
IN
= 0.1 VCC or V
IN
= 0.9 VCC −10.0 +10.0 µA
Output Low Voltage V
OL
, I
OL
= 3.0 mA 0.4 V
I
2
C INTERFACE TIMING See Figure 10
SCK Clock Frequency 400 kHz
SCK Pulse Width High t
HIGH
600 ns
SCK Pulse Width Low t
LOW
1300 ns
Start Condition Hold Time t
HD;STA
600 ns
Start Condition Setup Time t
SU;STA
600 ns
Data Setup Time t
SU;DAT
100 ns
Data Hold Time t
HD ; DAT
300 ns
SCK/SDA Rise/Fall Time T
R
/T
F
20 + 0.1 Cb
1
300 ns
Stop Condition Setup Time t
SU;STO
600 ns
Bus Free Time Between a Stop and a Start
BUF
REFCLK CHARACTERISTICS Optional lock to REFCLK mode
Input Voltage Range @ REFCLKP or REFCLKN
V
IL
0 V
V
IH
VCC V
Minimum Differential Input Drive 100 mV p-p
Reference Frequency 10 160 MHz
Required Accuracy 100 ppm
LVTTL DC INPUT CHARACTERISTICS
Input High Voltage V
IH
2.0 V
Input Low Voltage V
IL
0.8 V
IH
IN
Input Low Current I
IL
, V
IN
= 0.4 V −5 µA
LVTTL DC OUTPUT CHARACTERISTICS
Output High Voltage V
OH
, I
OH
= −2.0 mA 2.4 V
Output Low Voltage V
OL
, I
OL
= 2.0 mA 0.4 V
1
Cb = total capacitance of one bus line in pF. If mixed with Hs-mode devices, faster fall-times are allowed.
