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2016-03-21 - EFM32GG900FXX - d0280_Rev1.40 10
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Alternate LOCATION
Functionality 0 1 2 3 4 5 6 Description
ADC0_CH2 PD2 Analog to digital converter ADC0, input channel number 2.
ADC0_CH3 PD3 Analog to digital converter ADC0, input channel number 3.
ADC0_CH4 PD4 Analog to digital converter ADC0, input channel number 4.
ADC0_CH5 PD5 Analog to digital converter ADC0, input channel number 5.
ADC0_CH6 PD6 Analog to digital converter ADC0, input channel number 6.
ADC0_CH7 PD7 Analog to digital converter ADC0, input channel number 7.
BOOT_RX PE11 Bootloader RX.
BOOT_TX PE10 Bootloader TX.
BU_STAT PE3
Backup Power Domain status, whether or not the system
is in backup mode
BU_VIN PD8 Battery input for Backup Power Domain
BU_VOUT PE2 Power output for Backup Power Domain
CMU_CLK0 PA2 PC12 PD7 Clock Management Unit, clock output number 0.
CMU_CLK1 PA1 PD8 PE12 Clock Management Unit, clock output number 1.
OPAMP_N0 PC5 Operational Amplifier 0 external negative input.
OPAMP_N1 PD7 Operational Amplifier 1 external negative input.
OPAMP_N2 PD3 Operational Amplifier 2 external negative input.
DAC0_OUT0 /
OPAMP_OUT0
PB11
Digital to Analog Converter DAC0_OUT0 /
OPAMP output channel number 0.
DAC0_OUT0ALT /
OPAMP_OUT0ALT
PC0 PC1 PC2 PC3 PD0
Digital to Analog Converter DAC0_OUT0ALT /
OPAMP alternative output for channel 0.
DAC0_OUT1 /
OPAMP_OUT1
PB12
Digital to Analog Converter DAC0_OUT1 /
OPAMP output channel number 1.
DAC0_OUT1ALT /
OPAMP_OUT1ALT
PC12 PC13 PC14 PC15 PD1
Digital to Analog Converter DAC0_OUT1ALT /
OPAMP alternative output for channel 1.
OPAMP_OUT2 PD5 PD0 Operational Amplifier 2 output.
OPAMP_P0 PC4 Operational Amplifier 0 external positive input.
OPAMP_P1 PD6 Operational Amplifier 1 external positive input.
OPAMP_P2 PD4 Operational Amplifier 2 external positive input.
DBG_SWCLK PF0 PF0 PF0 PF0
Debug-interface Serial Wire clock input.
Note that this function is enabled to pin out of reset, and
has a built-in pull down.
DBG_SWDIO PF1 PF1 PF1 PF1
Debug-interface Serial Wire data input / output.
Note that this function is enabled to pin out of reset, and
has a built-in pull up.
DBG_SWO PF2 PC15 PD1 PD2
Debug-interface Serial Wire viewer Output.
Note that this function is not enabled after reset, and must
be enabled by software to be used.
EBI_A00 PA12 PA12 PA12 External Bus Interface (EBI) address output pin 00.
EBI_A01 PA13 PA13 PA13 External Bus Interface (EBI) address output pin 01.
EBI_A02 PA14 PA14 PA14 External Bus Interface (EBI) address output pin 02.
EBI_A03 PB9 PB9 PB9 External Bus Interface (EBI) address output pin 03.
EBI_A04 PB10 PB10 PB10 External Bus Interface (EBI) address output pin 04.
EBI_A05 PC6 PC6 PC6 External Bus Interface (EBI) address output pin 05.
EBI_A06 PC7 PC7 PC7 External Bus Interface (EBI) address output pin 06.
EBI_A07 PE0 PE0 PE0 External Bus Interface (EBI) address output pin 07.