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EFM32GG900F1024G-E-D1I

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27
...the world's most energy friendly microcontrollers
2016-03-21 - EFM32GG900FXX - d0280_Rev1.40 13
www.silabs.com
Alternate LOCATION
Functionality 0 1 2 3 4 5 6 Description
LCD_BCAP_P PA12
LCD voltage booster (optional), boost capacitor, positive
pin. If using the LCD voltage booster, connect a 22 nF ca-
pacitor between LCD_BCAP_N and LCD_BCAP_P.
LCD_BEXT PA14
LCD voltage booster (optional), boost output. If using the
LCD voltage booster, connect a 1 uF capacitor between
this pin and VSS.
An external LCD voltage may also be applied to this pin if
the booster is not enabled.
If AVDD is used directly as the LCD supply voltage, this
pin may be left unconnected or used as a GPIO.
LCD_COM0 PE4 LCD driver common line number 0.
LCD_COM1 PE5 LCD driver common line number 1.
LCD_COM2 PE6 LCD driver common line number 2.
LCD_COM3 PE7 LCD driver common line number 3.
LCD_SEG0 PF2
LCD segment line 0. Segments 0, 1, 2 and 3 are con-
trolled by SEGEN0.
LCD_SEG1 PF3
LCD segment line 1. Segments 0, 1, 2 and 3 are con-
trolled by SEGEN0.
LCD_SEG2 PF4
LCD segment line 2. Segments 0, 1, 2 and 3 are con-
trolled by SEGEN0.
LCD_SEG3 PF5
LCD segment line 3. Segments 0, 1, 2 and 3 are con-
trolled by SEGEN0.
LCD_SEG4 PE8
LCD segment line 4. Segments 4, 5, 6 and 7 are con-
trolled by SEGEN1.
LCD_SEG5 PE9
LCD segment line 5. Segments 4, 5, 6 and 7 are con-
trolled by SEGEN1.
LCD_SEG6 PE10
LCD segment line 6. Segments 4, 5, 6 and 7 are con-
trolled by SEGEN1.
LCD_SEG7 PE11
LCD segment line 7. Segments 4, 5, 6 and 7 are con-
trolled by SEGEN1.
LCD_SEG8 PE12
LCD segment line 8. Segments 8, 9, 10 and 11 are con-
trolled by SEGEN2.
LCD_SEG9 PE13
LCD segment line 9. Segments 8, 9, 10 and 11 are con-
trolled by SEGEN2.
LCD_SEG10 PE14
LCD segment line 10. Segments 8, 9, 10 and 11 are con-
trolled by SEGEN2.
LCD_SEG11 PE15
LCD segment line 11. Segments 8, 9, 10 and 11 are con-
trolled by SEGEN2.
LCD_SEG12 PA15
LCD segment line 12. Segments 12, 13, 14 and 15 are
controlled by SEGEN3.
LCD_SEG13 PA0
LCD segment line 13. Segments 12, 13, 14 and 15 are
controlled by SEGEN3.
LCD_SEG14 PA1
LCD segment line 14. Segments 12, 13, 14 and 15 are
controlled by SEGEN3.
LCD_SEG15 PA2
LCD segment line 15. Segments 12, 13, 14 and 15 are
controlled by SEGEN3.
LCD_SEG16 PA3
LCD segment line 16. Segments 16, 17, 18 and 19 are
controlled by SEGEN4.
LCD_SEG17 PA4
LCD segment line 17. Segments 16, 17, 18 and 19 are
controlled by SEGEN4.
LCD_SEG18 PA5
LCD segment line 18. Segments 16, 17, 18 and 19 are
controlled by SEGEN4.
LCD_SEG19 PA6
LCD segment line 19. Segments 16, 17, 18 and 19 are
controlled by SEGEN4.
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2016-03-21 - EFM32GG900FXX - d0280_Rev1.40 14
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Alternate LOCATION
Functionality 0 1 2 3 4 5 6 Description
LCD_SEG20/
LCD_COM4
PB3
LCD segment line 20. Segments 20, 21, 22 and 23 are
controlled by SEGEN5. This pin may also be used as LCD
COM line 4
LCD_SEG21/
LCD_COM5
PB4
LCD segment line 21. Segments 20, 21, 22 and 23 are
controlled by SEGEN5. This pin may also be used as LCD
COM line 5
LCD_SEG22/
LCD_COM6
PB5
LCD segment line 22. Segments 20, 21, 22 and 23 are
controlled by SEGEN5. This pin may also be used as LCD
COM line 6
LCD_SEG23/
LCD_COM7
PB6
LCD segment line 23. Segments 20, 21, 22 and 23 are
controlled by SEGEN5. This pin may also be used as LCD
COM line 7
LCD_SEG24 PF6
LCD segment line 24. Segments 24, 25, 26 and 27 are
controlled by SEGEN6.
LCD_SEG25 PF7
LCD segment line 25. Segments 24, 25, 26 and 27 are
controlled by SEGEN6.
LCD_SEG26 PF8
LCD segment line 26. Segments 24, 25, 26 and 27 are
controlled by SEGEN6.
LCD_SEG27 PF9
LCD segment line 27. Segments 24, 25, 26 and 27 are
controlled by SEGEN6.
LCD_SEG28 PD9
LCD segment line 28. Segments 28, 29, 30 and 31 are
controlled by SEGEN7.
LCD_SEG29 PD10
LCD segment line 29. Segments 28, 29, 30 and 31 are
controlled by SEGEN7.
LCD_SEG30 PD11
LCD segment line 30. Segments 28, 29, 30 and 31 are
controlled by SEGEN7.
LCD_SEG31 PD12
LCD segment line 31. Segments 28, 29, 30 and 31 are
controlled by SEGEN7.
LCD_SEG32 PB0
LCD segment line 32. Segments 32, 33, 34 and 35 are
controlled by SEGEN8.
LCD_SEG33 PB1
LCD segment line 33. Segments 32, 33, 34 and 35 are
controlled by SEGEN8.
LCD_SEG34 PB2
LCD segment line 34. Segments 32, 33, 34 and 35 are
controlled by SEGEN8.
LCD_SEG35 PA7
LCD segment line 35. Segments 32, 33, 34 and 35 are
controlled by SEGEN8.
LCD_SEG36 PA8
LCD segment line 36. Segments 36, 37, 38 and 39 are
controlled by SEGEN9.
LCD_SEG37 PA9
LCD segment line 37. Segments 36, 37, 38 and 39 are
controlled by SEGEN9.
LCD_SEG38 PA10
LCD segment line 38. Segments 36, 37, 38 and 39 are
controlled by SEGEN9.
LCD_SEG39 PA11
LCD segment line 39. Segments 36, 37, 38 and 39 are
controlled by SEGEN9.
LES_ALTEX0 PD6 LESENSE alternate exite output 0.
LES_ALTEX1 PD7 LESENSE alternate exite output 1.
LES_ALTEX2 PA3 LESENSE alternate exite output 2.
LES_ALTEX3 PA4 LESENSE alternate exite output 3.
LES_ALTEX4 PA5 LESENSE alternate exite output 4.
LES_ALTEX5 PE11 LESENSE alternate exite output 5.
LES_ALTEX6 PE12 LESENSE alternate exite output 6.
LES_ALTEX7 PE13 LESENSE alternate exite output 7.
LES_CH0 PC0 LESENSE channel 0.
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2016-03-21 - EFM32GG900FXX - d0280_Rev1.40 15
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Alternate LOCATION
Functionality 0 1 2 3 4 5 6 Description
LES_CH1 PC1 LESENSE channel 1.
LES_CH2 PC2 LESENSE channel 2.
LES_CH3 PC3 LESENSE channel 3.
LES_CH4 PC4 LESENSE channel 4.
LES_CH5 PC5 LESENSE channel 5.
LES_CH6 PC6 LESENSE channel 6.
LES_CH7 PC7 LESENSE channel 7.
LES_CH8 PC8 LESENSE channel 8.
LES_CH9 PC9 LESENSE channel 9.
LES_CH10 PC10 LESENSE channel 10.
LES_CH11 PC11 LESENSE channel 11.
LES_CH12 PC12 LESENSE channel 12.
LES_CH13 PC13 LESENSE channel 13.
LES_CH14 PC14 LESENSE channel 14.
LES_CH15 PC15 LESENSE channel 15.
LETIM0_OUT0 PD6 PB11 PF0 PC4 Low Energy Timer LETIM0, output channel 0.
LETIM0_OUT1 PD7 PB12 PF1 PC5 Low Energy Timer LETIM0, output channel 1.
LEU0_RX PD5 PB14 PE15 PF1 PA0 LEUART0 Receive input.
LEU0_TX PD4 PB13 PE14 PF0 PF2
LEUART0 Transmit output. Also used as receive input in
half duplex communication.
LEU1_RX PC7 PA6 LEUART1 Receive input.
LEU1_TX PC6 PA5
LEUART1 Transmit output. Also used as receive input in
half duplex communication.
LFXTAL_N PB8
Low Frequency Crystal (typically 32.768 kHz) negative
pin. Also used as an optional external clock input pin.
LFXTAL_P PB7 Low Frequency Crystal (typically 32.768 kHz) positive pin.
PCNT0_S0IN PC13 PE0 PC0 PD6 Pulse Counter PCNT0 input number 0.
PCNT0_S1IN PC14 PE1 PC1 PD7 Pulse Counter PCNT0 input number 1.
PCNT1_S0IN PC4 PB3 Pulse Counter PCNT1 input number 0.
PCNT1_S1IN PC5 PB4 Pulse Counter PCNT1 input number 1.
PCNT2_S0IN PD0 PE8 Pulse Counter PCNT2 input number 0.
PCNT2_S1IN PD1 PE9 Pulse Counter PCNT2 input number 1.
PRS_CH0 PA0 PF3 Peripheral Reflex System PRS, channel 0.
PRS_CH1 PA1 PF4 Peripheral Reflex System PRS, channel 1.
PRS_CH2 PC0 PF5 Peripheral Reflex System PRS, channel 2.
PRS_CH3 PC1 PE8 Peripheral Reflex System PRS, channel 3.
TIM0_CC0 PA0 PA0 PF6 PD1 PA0 PF0 Timer 0 Capture Compare input / output channel 0.
TIM0_CC1 PA1 PA1 PF7 PD2 PC0 PF1 Timer 0 Capture Compare input / output channel 1.
TIM0_CC2 PA2 PA2 PF8 PD3 PC1 PF2 Timer 0 Capture Compare input / output channel 2.
TIM0_CDTI0 PA3 PC13 PF3 PC13 PC2 PF3 Timer 0 Complimentary Deat Time Insertion channel 0.
TIM0_CDTI1 PA4 PC14 PF4 PC14 PC3 PF4 Timer 0 Complimentary Deat Time Insertion channel 1.
TIM0_CDTI2 PA5 PC15 PF5 PC15 PC4 PF5 Timer 0 Complimentary Deat Time Insertion channel 2.
TIM1_CC0 PC13 PE10 PB0 PB7 PD6 Timer 1 Capture Compare input / output channel 0.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27

EFM32GG900F1024G-E-D1I

Mfr. #:
Buy EFM32GG900F1024G-E-D1I
Manufacturer:
Silicon Labs
Description:
IC MCU 32BIT 1MB FLASH WAFER
Lifecycle:
New from this manufacturer.
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