MAX8686
Single/Multiphase, Step-Down,
DC-DC Converter Delivers Up to 25A Per Phase
10 ______________________________________________________________________________________
VL
500μA
S2
TO S4
PGND
RTN
10μA
LX
IN
LEVEL
SHIFT
BST
INA
UVLO
THERMAL
SHDN
RAMP
GENERATOR
5.4V LDO
GENERATOR
PWM
CONTROL
LOGIC
CURRENT-LIMIT
CONTROL LOGIC
VOLTAGE
REFERENCE
SLAVE MODE
DETECTION
SLAVE MODE = S1, S2, S3, S5, S6 OPEN
MASTER MODE = S1, S2, S5, S6 CLOSE
10μA
AVL
FREQ
UV
OV
PHASE/REFO
V
REF
SOFT-START
CIRCUITRY
EN/SLOPE
EN/SLOPE
VL
AVL
SS
S6
CLOCK
GENERATOR
0.9
1.2
REFIN FB
POK
EN/SLOPE
g
M
ERROR
AMPLIFIER
PWM
COMPARATOR
PEAK CURRENT-
LIMIT COMPARATOR
S1
S3
S4
AVL
AVL
S5
V
SUM
REFIN
RS+
RS-
FB
COMP
CS+
CS-
SLOPE
COMP
1/2
CURRENT-
SENSE
AMPLIFIER
30.5
30.5
ILIM
GND
MAX8686
GFREQ
Functional Diagram
Detailed Description
DC-DC Converter Control Architecture
The MAX8686 step-down regulator uses a PWM, cur-
rent-mode control scheme. An internal transconduc-
tance amplifier establishes an integrated error voltage.
The heart of the PWM controller is a PWM comparator
that compares the integrated voltage-feedback signal
against the amplified current-sense signal plus an
adjustable slope-compensation ramp, which is
summed with the current signal to ensure stability. At
each rising edge of the internal clock, the internal high-
side MOSFET turns on until the PWM comparator trips
or the maximum duty cycle is reached. During this on-
time, current ramps up through the inductor, storing
energy in the inductor while sourcing current to the
output. The current-mode feedback system regulates the
peak inductor current as a function of the output-voltage
error signal. The circuit acts as a switch-mode transcon-
ductance amplifier and pushes an output LC filter pole
normally found in a voltage-mode PWM to a higher fre-
quency. See the
Functional Diagram
.
During the second half of the cycle, the internal high-side
MOSFET turns off and the internal low-side MOSFET
turns on. The inductor releases the stored energy as the
current ramps down, providing current to the load. The
output capacitor stores charge when the inductor cur-
rent exceeds the required load current and discharges
when the inductor current is lower, smoothing the volt-
age across the load. Under soft-overload conditions,
when the peak inductor current exceeds the selected
current limit (see the
Current-Limit Circuit
section), the
high-side MOSFET is turned off immediately and the
low-side MOSFET is turned on and remains on to let the
inductor current ramp down until the next clock cycle.
Under severe-overload or short-circuit conditions, the
foldback/hiccup current limit is enabled to reduce
power dissipation.
The MAX8686 operates in a forced-PWM mode. The
converter maintains a constant switching frequency,
regardless of load, to allow for easier filtering of the
switching noise.
Internal Linear Regulator (VL)
The MAX8686 contains an internal LDO regulator that
provides a 5.4V supply for the MOSFET gate drivers.
Connect at least a 1μF ceramic capacitor from VL to
RTN. VL also provides power to the internal analog cir-
cuit through AVL. Connect an RC lowpass filter (R =
10Ω, C = 0.22μF) from VL to AVL.
Undervoltage Lockout
When AVL drops below 4.03V, the MAX8686 assumes
that the supply voltage is too low to make valid deci-
sions, so the undervoltage-lockout (UVLO) circuitry
inhibits switching and turns off both power MOSFETs.
When AVL rises above 4.35V, the regulator enters the
startup sequence and then resumes normal operation.
When operating in a multiphase configuration, the AVL
of all the devices must exceed the UVLO threshold
before any switching begins. This is achieved through
the shared ILIM pin, which is pulled low in UVLO.
Startup, Soft-Start, and Prebias Operation
The internal soft-start circuitry gradually ramps up the
reference voltage in order to control the rate of rise of
the output voltage and reduce input surge currents dur-
ing startup. The soft-start time is determined by the
value of the capacitor from SS to GND and is approxi-
mately equal to 50ms per microfarad of the capacitor.
In addition, the MAX8686 features monotonic output-
voltage rise (prebias); therefore, both power MOSFETs
are kept off if the voltage between the remote sense
input (RS+, RS-) is higher than the voltage at REFIN.
This allows the MAX8686 to start up into a prebiased
output without pulling the output voltage down.
Before the MAX8686 can begin the soft-start and
power-up sequence, the following conditions must be
met: AVL exceeds the 4.35V UVLO threshold, EN is at
logic-high, and the thermal limit is not exceeded.
Reference Output
(PHASE/REFO)/Reference Input (REFIN)
The reference voltage REFO can be used to set the out-
put voltage by scaling this voltage down with a resistive
divider and using it as the input voltage to the reference
input, REFIN. The 3.3V reference voltage is 1% accurate
over temperature and can source up to 20μA.
The reference input REFIN allows the reference value of
the device to be set by an external reference. In most
applications, the 3.3V voltage with 1% accuracy from
the PHASE/REFO pin should be used as the reference.
This can be achieved by dividing the 3.3V voltage to
the desired output voltage.
MAX8686
Single/Multiphase, Step-Down,
DC-DC Converter Delivers Up to 25A Per Phase
______________________________________________________________________________________ 11
MAX8686
For using an external reference on REFIN, SS needs to
be tied to REFIN either directly or indirectly through a
resistor for soft-start. For REFIN voltage lower than
1.25V, connect a resistor between SS and REFIN such
that the voltage drop across the resistor due to the soft-
start current (31μA max) coming out of SS, causing the
final SS voltage to be at least 1.25V (see Figure 1a).
The external reference should be able to sink at least
31μA. Calculate R
REFIN
as follows:
where V
EXT
is the external reference voltage.
In a multiphase converter, only REFIN of the master
device is connected to a reference voltage, and the
REFIN of all slave devices should be tied to GND.
The REFIN also allows for coincident voltage tracking of
multiple converters during power-up/power-down by
applying the same voltage on REFIN of the master
device in each converter.
Enable, Phase Shedding, and
Slope Compensation Input (EN/SLOPE)
An internal 10μA current source pulls the EN/SLOPE
input high. The device shuts down when the voltage at
the EN/SLOPE falls below 0.7V. By connecting an
open-drain or open-collector switch to the EN/SLOPE,
this pin can be used to enable/disable a single-phase
or multiphase converter system.
A separate system signal can be used to shed some
phases of the converter at light load to eliminate all the
power loss from these phases and thus improve the sys-
tem efficiency. The phase shedding signal is connected
to the EN/SLOPE pins of the slave devices to be shed.
The right timing of the phase shedding signal from the
system is critical for the safe operation of the multiphase
converter. Only after the load current drops below a cer-
tain level, should the phase shedding signal become
high. When the open-drain or open-collector switch is
logic-low, it shuts down the slave phases connected to
the switch to reduce power loss. Before the load current
increases to a certain level, the phase shedding signal
should become logic-high to release the EN/SLOPE of
these slave devices, thus turning these phases back on
again to prepare for the higher load current. A minimum
load of 2A per phase in the remaining phases is
required for the shedded phase(s) to turn on.
The transfer function of the power stage is different with a
different number of phases. As the number of phases
increases, the power stage gain increases. The compen-
sation network should be designed such that the convert-
er is always stable with the maximum number of phases.
The EN/SLOPE input is also used to set the slope com-
pensation ramp voltage by connecting a resistor from this
input to GND. The slope compensation is used to stabi-
lize the converters when the duty cycle is more than 40%.
High-Side Gate-Drive Supply (BST)
A flying capacitor between BST and LX generates the
gate-drive voltage for the internal high-side n-channel
MOSFET. When the low-side MOSFET is turned on, the
capacitor is charged by VL to 5.4V minus the drop
across the internal boost switch. When the low-side
MOSFET is turned off, the stored voltage of the capaci-
tor is stacked above LX to provide the necessary turn-
on voltage (V
GS
) for the high-side MOSFET. An internal
switch between BST and the internal high-side MOSFET’s
gate closes to turn the MOSFET on.
Current-Sense Amplifier
The current-sense circuit amplifies the differential current-
sense voltage (V
CS+
- V
CS-
). This amplified current-sense
signal and the internal-slope-compensation signal are
summed (V
SUM
) together and fed into the PWM com-
parator’s inverting input. The high-side MOSFET is turned
on by the clock in the device and is shut off when V
SUM
exceeds the error-amplifier output voltage (V
COMP
) at
the noninverting input of the PWM comparator. The dif-
ferential current sense is also used to provide peak
inductor current limiting. The limit can be set by adjust-
ing the analog current-limit input (ILIM).
The current-sense amplifier is used to measure the cur-
rent across the inductor by connecting to the inductor
through an RC network for lossless current sensing or
connecting to a current-sense resistor for higher accu-
racy. The input common-mode voltage range of the
current-sense amplifier is from 0 to 5.5V.
R
V
μA
REFIN
EXT
.
=
125
19
Single/Multiphase, Step-Down,
DC-DC Converter Delivers Up to 25A Per Phase
12 ______________________________________________________________________________________
MAX8686
REFIN
R
REFIN
V
EXT
SS
Figure 1a. Using an External Reference

MAX8686ETL+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Switching Voltage Regulators Multiphase Step-Down DC/DC Converter
Lifecycle:
New from this manufacturer.
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