MAX8686
resistor, and compensation capacitors determine the
loop stability. The inductor and output capacitor are
chosen based on performance, size, and cost.
Additionally, the compensation resistor and capacitors
are selected to optimize control-loop stability. The compo-
nent values, shown in Figures 2, 3, and 4, yield stable
operation over the given range of input-to-output voltages.
The regulator uses a current-mode control scheme that
regulates the output voltage by forcing the required
current through the external inductor. The voltage drop
across the DC resistance of the inductor or the alter-
nate series current-sense resistor is used to measure
the inductor current. Current-mode control eliminates
the double pole in the feedback loop caused by the
inductor and output capacitor resulting in a smaller
phase shift and requiring a less elaborate error-amplifi-
er compensation than voltage-mode control. A simple
series R
C
and C
C
is all that is needed to have a stable,
high-bandwidth loop in applications where ceramic
capacitors are used for output filtering. For other types
of capacitors, due to the higher capacitance and ESR,
the frequency of the zero created by the capacitance
and ESR is lower than the desired closed-loop crossover
frequency. To stabilize a nonceramic output-capacitor
loop, add another compensation capacitor from COMP
to GND to cancel this ESR zero. See Figure 6.
The basic regulator loop is modeled as a power modula-
tor, an output feedback divider, and an error amplifier.
The power modulator has DC gain set by g
mc
x R
LOAD
,
with a pole and zero pair set by R
LOAD
, the output capac-
itor (C
OUT
), and its equivalent series resistance (ESR).
Below are equations that define the power modulator:
where R
LOAD
= V
OUT
/[I
OUT(MAX)
/N], f
SW
is the switch-
ing frequency, L is the output inductance, g
mc
=
1/(A
VCS
x R
DC
), where A
VCS
is the gain of the current-
sense amplifier (30.5 typ), R
DC
is the DC resistance of
the inductor, the duty cycle D = V
OUT
/V
IN
. K
S
is a slope
compensation factor calculated from the following
equation:
Find the pole and zero frequencies created by the
power modulator as follows:
when C
OUT
comprises “n” identical capacitors in paral-
lel, the resulting C
OUT
= n x C
OUT(EACH)
, and ESR =
ESR
(EACH)
/n. Note that the capacitor zero for a parallel
combination of like capacitors is the same as for an
individual capacitor.
The transconductance error amplifier has a DC gain,
G
EA(DC)
= g
mEA
x R
O
, where g
mEA
is the error-amplifi-
er transconductance, which is equal to 1.7mS, and R
O
is the output resistance of the error amplifier, which is
30MΩ. A dominant pole (f
pdEA
) is set by the compen-
sation capacitor (C
C
), the amplifier output resistance
(R
O
), and the compensation resistor (R
C
); a zero (f
zEA
)
is set by the compensation resistor (R
C
) and the com-
pensation capacitor (C
C
). There is an optional pole
(f
pEA
) set by C
F
and R
C
to cancel the output capacitor
ESR zero if it occurs near the crossover frequency (f
C
).
Thus:
The crossover frequency, f
C
, should be much higher
than the power-modulator pole f
PMOD
. Also, f
C
should
