74LVC594A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 21 October 2013 12 of 20
NXP Semiconductors
74LVC594A
8-bit shift register with output register
Measurement points are given in Table 8.
V
OL
and V
OH
are typical output voltage drops that occur with the output load.
Fig 11. The shift reset (SHR) pulse width, the shift reset to serial data output (Q7S) propagation delays and the
shift reset to shift clock (SHCP) recovery time
PEF
9
0
W
3+/
9
0
W
UHF
W
:
9
0
6+&3LQSXW
46RXWSXW
6+5LQSXW
Measurement points are given in Table 8.
V
OL
and V
OH
are typical output voltage drops that occur with the output load.
Fig 12. The storage reset (STR) pulse width, the storage reset to parallel data output (Qn) propagation delays and
the storage reset to storage clock (STCP) recovery time
PEF
9
0
W
3+/
9
0
W
UHF
W
:
9
0
67&3LQSXW
4QRXWSXWV
675LQSXW
Table 8. Measurement points
Supply voltage Input Output
V
CC
V
M
V
M
V
CC
<2.7V 0.5 V
CC
0.5 V
CC
V
CC
2.7 V 1.5 V 1.5 V
