MAX3580
Direct-Conversion TV Tuner
______________________________________________________________________________________ 13
Register Descriptions
N-Divider Integer (Register Address 0x00)
N<7:0>: VCO Integer-N Divider Ratio
N-Divider Frac2 (Register Address 0x01)
MP: Minimum CP Pulse Width. Always set to 0
(factory use only).
LI1, LI0; CP Linearity Control. Always set to 00
(factory use only).
INT: Integer Mode ON/OFF. Set to 0 for normal
operation.
F<19:16>: MSB of Main Divider Fractional Divide Ratio
N-Divider Frac1, Frac0
(Register Address 0x02, 0x03)
F<15:0> 16 LSB of Main Divider Fractional Divide
Ratio
Tracking Filter Series Capacitor
(Register Address 0x04)
TFS<7:4>: Tracking Filter Parallel Capacitor.
TFS<3:0>: Tracking Filter Series Capacitor.
See the RF tracking filter description in the
Applications
Information
section.
Tracking Filter Parallel Capacitor and VCO Control
(Register Address 0x05)
VCO_DIV1, VCO_DIV0: VCO Post Divider
00 = Divide by 4 use for RF frequencies of 540 to
868 MHz
01 = Divide by 8 use for RF frequencies of 470 to
550 MHz
10 = Divide by 16 use for RF frequencies of 170 to
230 MHz
11 = Divide by 32 is not used
RFS: RF Input Select
0 = RFIN2 selected
1 = RFIN selected
TF_BS: Tracking Filter Band Select
1 = VHF band
0 = UHF band
TFP<4:0>: Tracking Filter Shunt Capacitor
See the RF tracking filter description in the
Applications
Information
section.
PLL Configuration (Register Address 0x06)
LF_DIV2, LF_DIV1, LF_DIV0: Prescaler for Internal
Low Frequency Clocks
000 - 110 = Divided by 8 to 14 for REF crystal fre-
quencies of 15MHz to 28MHz
111 = Divide by 2 for REF crystal frequencies of
4MHz
ADLY1, ADLY0: VCO Autotuner Delay Selection
CPS: Charge-Pump Current Mode
0 = Controlled by ICP bit
1 = Controlled by VCO autotuner
ICP: Charge-Pump Current
0 = 600µA
1 = 1200µA
RDIV: PLL Reference Divider Ratio
0 = Divide by 1
1 = Divide by 2
Test Functions (Register Address 0x07)
CP_TST<2:0>: Charge-Pump Test Modes
000 = Normal operation
100 = Low impedance*
101 = Source
110 = Sink
111 = High impedance
LD_MUX: Lock-Detector Mode
000 = Normal operation: high = PLL locked,
low = unlocked
001 = Monitor N-divider output, post-divided by 2
010 = Monitor R-divider output*
011 = Modulator test vector output
(factory use only)
1XX = Bias current trim (factory use only)
*
Not production tested.
MAX3580
Direct-Conversion TV Tuner
14 ______________________________________________________________________________________
Shutdown Control (Register Address 0x08)
SHDN_BG: Main Bandgap
0 = Enabled
1 = Disabled
The main bandgap can and will be shut down
once all other blocks are shut down (i.e., all bits in this
shutdown register and bits VCO_ in the VCO
Control Register and bits DC_MO_ in the DC
Offset Control Register are shut down).
SHDN_PD: Baseband Power Detector
For factory use only.
Set to 1 at all times.
SHDN_RF: RF LNA/VGA:
0 = Enabled
1 = Disabled
SHDN_MIX: I/Q Mixer and LO Drivers
0 = Enabled
1 = Disabled
SHDN_BB: Baseband Filters and VGA
0 = Enabled
1 = Disabled
SHDN_SYN: Fractional PLL
0 = Enabled
1 = Disabled
SHDN_REF: Controls the Crystal Oscillator Buffered
Output
0 = Enabled
1 = Disabled
The XTAL oscillator activation results from the
SHDN_SYN, SHDN_REF bits: If either one is on,
the XTAL oscillator runs. The XTAL oscillator is
shut down only if both bits are off.
VCO Control (Register Address 0x09)
VCO<1:0>: Selects 1 of 3 VCO Bands. 00 turns off
VCO block completely.
BS<2:0>: Selects 1 of 8 VCO Sub-Bands
VAS: VCO Band Autoselect
0 = VCO band select controlled by bits VCO<1:0>
1 = Controlled by autotuner
ADL: VCO ADC Latch Enable Bit
1 = Latches ADC value
0 = Default
ADE: Enable VCO Tune Voltage DAC Read
1 = Enables ADC read
0 = Default
Baseband Control (Register Address 0x0A)
PD_TH<2:0>: Detection Threshold for Baseband
Power Detector
BB_BW<3:0>: Baseband Filter Bandwidth. Optimum
values for 7MHz and 8MHz wide RF channels can
be taken from the ROM table.
DC Offset Control (Register Address 0x0B)
DC_TH<1:0>: DC Offset Correction Thresholds.
Keeps output within:
00 = Output within ±0.55V of balanced state
11 = Output within ±0.75V of balanced state
DC_SP<1:0>: DC Offset Correction Speed (or Highpass
Corner Frequency).
11 = Fast (~500Hz)
01 = Slow (~20Hz)
00 = Off/hold DAC values
DC_MO<1:0>: Mode of Operation
00 = Off
10/01 = Sets I/Q channel DACs direct from register
11 = Normal operation
DC_DAC<8>: MSB for DC Offset DAC
BB_BIA: Baseband Filter Op-Amp Bias Settings
0 = Low
1 = High
*
Not production tested.
MAX3580
Direct-Conversion TV Tuner
______________________________________________________________________________________ 15
DC Offset DAC (Register Address 0x0C)
DC_DAC<7:0>: Value to Program to I/Q DC Offset
DAC. Note that the MSB is located in the previous register.
Tracking Filter ROM Address
(Register Address 0x0D)
TFA<3:0>: Tracking Filter ROM Address. See Table 3.
Tracking Filter Write Data (Register Address 0x0E)
TFD<7:0>: Tracking Filter Data for ROM
Tracking Filter ROM Read Back (Read Only)
(Register Address 0x10)
TFR<7:0>: Tracking Filter ROM Data Read Back
Status (Read Only, for Factory Use Only)
(Register Address 0x11)
POR: Power-On Reset*
0 = Power has not been reset since the last read.
1 = Power has been reset since the last read. Gets
reset after reading back address 8’h0C.
VASA, VASE: VCO Autotuner Status*
LD: PLL Lock Detector
0 = PLL unlocked
1 = PLL locked
DC_HI: DC Offset Correction Detected Positive Signal
Excursion in Either I or Q Channel*
DC_LO: DC Offset Correction Detected Negative Signal
Excursions in Either I or Q Channel*
PD_OVLD: Baseband Power Detector*
0 = Baseband signal below threshold
1 = Baseband signal above threshold
Autotuner Read Back (Read Only, for Factory Use
Only) (Register Address 0x12)
VCOA<1:0> VCO Tank Selected by Autotuner*
BSA<1:0> Sub-Band VCO Selected by Autotuner*
ADC<2:0> VCO Tank Voltage ADC*
Table 3. MAX3580 Fuse Table
BYTE76543 2 1 0 DESCRIPTION
00 Unused Bias Bias trim
01 VHF (200MHz) parallel cap VHF (200MHz) series cap VHF high series cap
02 Unused VHF (200MHz) shunt cap VHF shunt cap
03 UHF low (470MHz) parallel cap UHF low (470MHz) series cap UHF low series cap low
04 UHF high (860MHz) shunt cap UHF low (470MHz) shunt cap UHFhigh/low parallel cap
05 UHF high (860MHz) parallel cap UHF high (860MHz) series cap UHF high series cap
06 Baseband filter UHF (8MHz) coefficient. Baseband filter VHF (7MHz) coefficient. BB filter bandwidth
07 X X X X X X X RO Read only
*
Not production tested.

MAX3580ETJ+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Tuners Direct Conversion TV Tuner
Lifecycle:
New from this manufacturer.
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