LTC2960
7
2960fa
For more information www.linear.com/LTC2960
block DiagraM
TiMing DiagraM
+
REGULATOR
400mV
REFERENCE
RESET
DELAY
V
CC
MR
RST
OUT
IN
+
(LTC2960-1/LTC2960-3)
IN
(LTC2960-2/LTC2960-4)
ADJ
A
0.4V
GND
RT
LTC2960-1/LTC2960-2
DV
CC
LTC2960-3/LTC2960-4
0.4V
LTC2960-2/LTC2960-4
LTC2960-1/LTC2960-3
+
2960 BD
IN
+
/OUT TIMING
IN
/OUT TIMING
ADJ/RST TIMING
V
TH
+ V
+
HYS
V
TH
V
TH
+ V
RHYS
V
TH
V
TH
V
TH
+ V
HYS
V
IN
+
V
ADJ
t
PD
t
RST
t
RST
V
IN
OUT
RST
MR
OUT
2960 TD
LTC2960
8
2960fa
For more information www.linear.com/LTC2960
VOLTAGE MONITORING
The LTC2960 is a voltage supervisor with a wide operating
voltage range up to 36V with only 850nA quiescent current.
The supervisor has two outputs, RST and OUT that pro
-
vide voltage monitoring capabilities for system power-up,
power
-down and brown-out conditions. Built-in hysteresis
and a reset timeout period ensure that fluctuations due to
load transients or supply noise do not cause chattering of
the status outputs. The LTC2960 can provide reset and
voltage status signals to a microprocessor based system
or can alternatively be used as an Under Voltage Lock Out
(UVLO) for DC/DC switchers or LDOs for control over a
battery operated system.
If the monitored voltage drops below the reset threshold,
RST pulls low until the ADJ input rises above 0.4V plus
2.5% hysteresis. An internal reset timer delays the return
of the RST output to a high state to provide monitored
voltage settling and initialization time. The RST output is
typically connected to a processor reset input.
If the monitored supply voltage falls to the IN
+
(LTC2960-1/
LTC2960-3) threshold, the spare comparator pulls OUT low.
OUT remains low until the IN
+
input rises above 0.4V plus
5% hysteresis. OUT
is typically used to signal preparation
for controlled shutdown. For example, the OUT output
may be connected to a processor nonmaskable interrupt
(NMI). Upon interrupt, the processor begins shutdown
procedures such as supply sequencing and/or storage/
erasure of system state in nonvolatile memory.
If the monitored supply voltage rises to the IN
threshold
(LTC2960-2/LTC2960-4), the spare comparator pulls OUT
low. OUT remains low until the IN
falls below 0.4V minus
5% hysteresis. The LTC2960-2/LTC2960-4 operates as an
undervoltage and overvoltage monitor.
Few, if any, external components are necessary for reliable
operation. However, a decoupling capacitor between V
CC
and ground is recommended (0.01µF minimum). Use a
capacitor with a compatible voltage rating.
applicaTions inForMaTion
THRESHOLD CONFIGURATION
The LTC2960 monitors voltage applied to its inputs IN
+
/IN
and ADJ. A resistive divider connected between a monitored
voltage and ground is used to bias the inputs. Figure 1
demonstrates how the inputs can be made dependent upon
a single voltage (V1). Only three resistors are required.
To calculate their values, specify desired falling reset (V
R
)
and IN
+
(V
IN
+
) thresholds with V
IN
+
> V
R
. For example:
V
IN
+
= 6.4V, V
R
= 6V
Figure 1. Configuration for Single Voltage Monitoring
ADJ
IN
+
RST
OUT
LTC2960-1/
LTC2960-3
R3
R2
V1
R1
2960 F01
The solution for R1, R2 and R3 provides three equations
and three unknowns. Maximum resistor size is governed
by maximum input leakage current. For the LTC2960, the
maximum input leakage current below 85°C is 1nA. For
a maximum error of 1% due to both input currents, the
resistor divider current should be at least 100 times the
sum of the leakage currents, or 0.2µA. If the total divider
resistance is chosen arbitrarily to be 8MΩ, such as in this
example, then the current is 750nA at the reset threshold.
This results in a leakage current error well below 1%.
For R
SUM
= 8MΩ, then:
R
SUM
= R1 + R2 + R3
Both the falling reset and IN
+
thresholds are 0.4V, so:
R1=
V
TH
R
SUM
V
IN
+
=
0.4V 8M
6.4V
= 500k
The closest 1%
value is 499k. R2 can be determined from:
R2 =
TH
SUM
V
R1=
6V
499k
R2 = 34.33k
LTC2960
9
2960fa
For more information www.linear.com/LTC2960
Figure 2. Dual Voltage Monitoring
The closest 1% resistor value is 34k. R3 is easily obtained
from:
R3 = R
SUM
– R1 – R2 = 8M – 499k – 34k
R3 = 7.467MΩ
The closest 1% resistor value is 7.5MΩ. Plugging the
standard values back into the equations yields the design
values for the falling reset and IN
+
voltages:
V
IN
+
= 6.4V, V
RST
= 6.028V
Figure 2 demonstrates how the inputs can be biased
to monitor two voltages (V1, V2). In this example, four
resistors are required. Calculate each divider ratio for the
desired falling threshold (V
FT
) using:
RnB
RnA
=
V
FT
V
TH
1=
V
FT
0.4V
1
In Figure 2,
OUT is tied back to the MR input, making the
state of the RST output dependent upon both V1 and V2. If
V1 and V2 are both above the configured falling threshold
plus hysteresis, RST is allowed to pull high. If independent
operation of the status outputs is desired, simply omit the
OUT and MR connection.
applicaTions inForMaTion
Figure 3. OUT vs V
CC
(LTC2960-1) Externally Configured for
6V Threshold with RST Tied to V
CC
Through Pull-Up Resistor
ADJ
IN
+
RST
OUT
MR
LTC2960-1/
LTC2960-3
R2B
V2
R2A
R1B
V1
R1A
2960 F02
SELECTING OUTPUT LOGIC STYLE
The LTC2960 status outputs are available in two options:
open-drain (LTC2960-1/LTC2960-2) or active pull-up with
the DV
CC
pin replacing the RT pin (LTC2960-3/LTC2960-4).
The open-drain option allows the outputs to be pulled up
V
CC
(V)
0
0
OUT (V)
6
3
4.5
1.5
7.5
7.51.5 3
2960 F03
4.5 6
to a user defined voltage up to 36V with a resistor. The
open-drain pull-up voltage may be greater than V
CC
. Select
a resistor compatible with desired output rise time and
load current specifications. Figure 3 demonstrates typical
LTC2960-1 OUT output behavior. When the status outputs
are low, power is dissipated in the pull-up resistors.
The outputs of both the LTC2960-3 and LTC2960-4 can
be configured as either low voltage active pull-up or open-
drain. This is done by tying the DV
CC
pin to either a supply
or GND. Using the active pull-up configuration, DV
CC
tied
to a supply, lowers power dissipation by eliminating the
static current drawn by pull-up resistors when the outputs
are low and improves output rise time. In Figure 4(a), an
LTC2960-3 has active pull-up outputs configured by tying
DV
CC
to a 1.6V to 5.5V supply. In Figure 4(b), the LTC2960-3
has open-drain
outputs configured by tying the DV
CC
pin to
ground. When DV
CC
is connected to ground both outputs
are open-drain and pull-up resistors are required.
Some applications require RST and/or OUT outputs to
be valid with V
CC
down to ground when DV
CC
is tied to
V
CC
. Active pull-up satisfies this requirement with the ad-
dition of an optional external resistor from the output to
ground.
The resistor provides a path for leakage currents,
preventing the output from floating to undetermined volt
-
ages when connected to high impedance (such as CMOS
logic inputs). The resistor value should be small enough to
provide effective pull-down without excessively loading the

LTC2960HDC-3#TRMPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Supervisory Circuits 36V Nano-Current Two Input Voltage Monitor (ADJ/IN+, 200ms, Active Pull-up, Logic Supply)
Lifecycle:
New from this manufacturer.
Delivery:
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