MAX1294BCEI+T Datasheet MAX1294BCEI+T, MAX1296BCEG, MAX1294BEEI | P13-P15

MAX1294/MAX1296

420ksps, +5V, 6-/2-Channel, 12-Bit ADCs

with +2.5V Reference and Parallel Interface

______________________________________________________________________________________ 13

External Clock Mode

To select external clock mode, bits D6 and D7 of the

control byte must be set to 1. Figure 6 shows the clock

and WR timing relationship for internal (Figure 6a) and

external (Figure 6b) acquisition modes with an external

clock. For proper operation, a 100kHz to 7.6MHz clock

frequency with 30% to 70% duty cycle is recommended.

Operating the MAX1294/MAX1296 with clock frequen-

cies lower than 100kHz is not recommended because

the resulting voltage droop across the hold capacitor in

the T/H stage degrades performance.

Digital Interface

The input and output data are multiplexed on a three-

state parallel interface (I/O) that can easily be inter-

faced with standard µPs. The signals CS, WR, and RD

control the write and read operations. CS represents

the chip-select signal, which enables a µP to address

the MAX1294/MAX1296 as an I/O port. When high, CS

disables the CLK, WR, and RD inputs and forces the

interface into a high-impedance (high-Z) state.

Figure 6a. External Clock and

Timing (Internal Acquisition Mode)

Figure 6b. External Clock and

Timing (External Acquisition Mode)

CLK

WR GOES HIGH WHEN CLK IS HIGH

WR GOES HIGH WHEN CLK IS LOW

CWS

CWH

ACQUISITION STARTS

CONVERSION STARTS

ACQUISITION ENDS

ACQMOD = "0"

CLK

WR GOES HIGH WHEN CLK IS HIGH

WR GOES HIGH WHEN CLK IS LOW

CWH

CWS

ACQUISITION STARTS

CONVERSION STARTS

ACQUISITION ENDS

ACQMOD = "1"

ACQMOD = "0"

MAX1294/MAX1296

420ksps, +5V, 6-/2-Channel, 12-Bit ADCs

with +2.5V Reference and Parallel Interface

14 ______________________________________________________________________________________

Input Format

The control bit sequence is latched into the device on

pins D7–D0 during a write command. Table 4 shows

the control-byte format.

Output Data Format

The 12-bit-wide output format for both the MAX1294/

MAX1296 is binary in unipolar mode and two’s comple-

ment in bipolar mode. CS, RD, WR, INT, and the 12 bits

of output data can interface directly to a 16-bit data bus.

When reading the output data, CS and RD must be low.

Applications Information

Power-On Reset

When power is first applied, internal power-on reset cir-

cuitry activates the MAX1294/MAX1296 in external clock

mode and sets INT high. After the power supplies stabi-

lize, the internal reset time is 10µs; no conversions

should be attempted during this phase. When using the

internal reference, 500µs is required for V

REF

to stabilize.

Internal and External Reference

The MAX1294/MAX1296 can be used with an internal

or external reference voltage. An external reference

can be connected directly to REF or REFADJ.

An internal buffer is designed to provide +2.5V at REF for

both devices. The internally trimmed +1.22V reference is

buffered with a +2.05V/V gain.

Internal Reference

The full-scale range with the internal reference is +2.5V

with unipolar inputs and ±1.25V with bipolar inputs. The

internal reference buffer allows for small adjustments

(±100mV) in the reference voltage (Figure 7).

Note: The reference buffer must be compensated with

an external capacitor (4.7µF min) connected between

REF and GND to reduce reference noise and switching

spikes from the ADC. To further minimize reference

noise, connect a 0.01µF capacitor between REFADJ

and GND.

External Reference

With the MAX1294/MAX1296, an external reference can

be placed at either the input (REFADJ) or the output

(REF) of the internal-reference buffer amplifier.

Using the REFADJ input makes buffering the external

reference unnecessary. The REFADJ input impedance

is typically 17kΩ.

When applying an external reference to REF, disable the

internal reference buffer by connecting REFADJ to V

The DC input resistance at REF is 25kΩ. Therefore, an

external reference at REF must deliver up to 200µA DC

load current during a conversion and have an output

impedance less than 10Ω. If the reference has higher

output impedance or is noisy, bypass it close to the REF

pin with a 4.7µF capacitor.

Power-Down Modes

To save power, place the converter in a low-current

shutdown state between conversions. Select standby

mode or shutdown mode using bits D6 and D7 of the

control byte (Tables 1 and 4). In both software power-

down modes, the parallel interface remains active, but

the ADC does not convert.

Standby Mode

While in standby mode, the supply current is typically

1mA. The part powers up on the next rising edge of WR

and is ready to perform conversions. This quick turn-on

time allows the user to realize significantly reduced

power consumption for conversion rates below

420ksps.

D6 D4D5

PD0

SGL/DIF

ACQMOD A2 A0A1

(LSB)

UNI/BIP

PD1

D1D3

(MSB)

Table 4. Control-Byte Format

= +5V

330kΩ

50kΩ

0.01µF

4.7µF

REFADJ

REF

MAX1294

MAX1296

Figure 7. Reference Adjustment with External Potentiometer

MAX1294/MAX1296

420ksps, +5V, 6-/2-Channel, 12-Bit ADCs

with +2.5V Reference and Parallel Interface

______________________________________________________________________________________ 15

Shutdown Mode

Shutdown mode turns off all chip functions that draw

quiescent current, reducing the typical supply current

to 2µA immediately after the current conversion is com-

pleted. A rising edge on WR causes the MAX1294/

MAX1296 to exit shutdown mode and return to normal

operation. To achieve full 12-bit accuracy with a 4.7µF

reference bypass capacitor, 500µs is required after

power-up. Waiting 500µs in standby mode, instead of

in full-power mode, can reduce power consumption by

a factor of three or more. When using an external refer-

ence, only 50µs is required after power-up. Enter

standby mode by performing a dummy conversion with

the control byte specifying standby mode.

Note: Bypass capacitors larger than 4.7µF between

REF and GND result in longer power-up delays.

Transfer Function

Table 5 shows the full-scale voltage ranges for unipolar

and bipolar modes. Figures 8 depicts the nominal

unipolar input/output (I/O) transfer function, and Figure 9

shows the bipolar I/O transfer function. Code transitions

occur halfway between successive-integer LSB values.

Output coding is binary, with 1 LSB = (V

REF

/ 4096).

Maximum Sampling Rate/

Achieving 475ksps

When running at the maximum clock frequency of

7.6MHz, the specified throughput of 420ksps is

achieved by completing a conversion every 18 clock

cycles: 1 write cycle, 3 acquisition cycles, 13 conver-

sion cycles, and 1 read cycle. This assumes that the

results of the last conversion are read before the next

control byte is written. It is possible to achieve higher

throughputs, up to 475ksps, by first writing a control

byte to begin the acquisition cycle of the next conver-

sion, and then reading the results of the previous con-

version from the bus. This technique (Figure 10) allows

a conversion to be completed every 16 clock cycles.

Note that the switching of the data bus during acquisi-

Table 5. Full Scale and Zero Scale for Unipolar and Bipolar Operation

111 . . . 111

111 . . . 110

100 . . . 010

100 . . . 001

100 . . . 000

011 . . . 111

011 . . . 110

011 . . . 101

000 . . . 001

000 . . . 000

INPUT VOLTAGE (LSB)

OUTPUT CODE

ZS = COM

FS = REF + COM

1 LSB =

REF

4096

FULL-SCALE

TRANSITION

(COM)

FS - 3/2 LSB

2048

UNIPOLAR MODE BIPOLAR MODE

REF

+ COM V

REF

/2 + COMPositive Full ScaleFull Scale

COM COMZero ScaleZero Scale

— -V

REF

/2 + COM Negative Full Scale—

Figure 8. Unipolar Transfer Functions

011 . . . 111

011 . . . 110

000 . . . 010

000 . . . 001

000 . . . 000

111 . . . 111

111 . . . 110

111 . . . 101

100 . . . 001

100 . . . 000

- FS

COM*

INPUT VOLTAGE (LSB)

OUTPUT CODE

ZS = COM

+FS - 1 LSB

+ COM

REF

-FS = + COM

-REF

1 LSB =

REF

4096

*COM ≥ V

REF

/ 2

Figure 9. Bipolar Transfer Functions

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P19

MAX1294BCEI+T

Mfr. #:

Buy MAX1294BCEI+T

Manufacturer:

Maxim Integrated

Description:

Analog to Digital Converters - ADC 12-Bit 6Ch 420ksps 5.5V Precision ADC

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MAX1294BCEI+T

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