_______________Detailed Description
The MAX5158/MAX5159 dual, 10-bit, voltage-output
DACs are easily configured with a 3-wire serial inter-
face. These devices include a 16-bit data-in/data-out
shift register, and each DAC has a double-buffered
input composed of an input register and a DAC register
(see
Functional Diagram
). In addition, trimmed internal
resistors produce an internal gain of +2V/V that maxi-
mizes output voltage swing. The amplifier’s offset-adjust
pin allows for a DC shift in the DAC’s output.
Both DACs use an inverted R-2R ladder network that
produces a weighted voltage proportional to the input
voltage value. Each DAC has its own reference input to
facilitate independent full-scale values. Figure 1
depicts a simplified circuit diagram of one of the two
DACs.
Reference Inputs
The reference inputs accept both AC and DC values
with a voltage range extending from 0V to (V
DD
- 1.4V).
Determine the output voltage using the following equa-
tion (OS_ = AGND):
V
OUT
= (V
REF
x NB / 1024) x 2
where NB is the numeric value of the DAC’s binary input
code (0 to 1023) and V
REF
is the reference voltage.
The reference input impedance ranges from 18kΩ
(1558 hex) to several giga ohms (with an input code of
0000 hex). The reference input capacitance is code
dependent and typically ranges from 15pF with an
input code of all zeros to 50pF with a full-scale input
code.
Output Amplifier
The output amplifiers on the MAX5158/MAX5159 have
internal resistors that provide for a gain of +2V/V when
OS_ is connected to AGND. These resistors are
trimmed to minimize gain error. The output amplifiers
have a typical slew rate of 0.75V/µs and settle to
1/2LSB within 8µs, with a load of 10kΩ in parallel with
100pF. Loads less than 2kΩ degrade performance.
The OS_ pin can be used to produce an adjustable off-
set voltage at the output. For instance, to achieve a 1V
offset, apply -1V to the OS_ pin to produce an output
range from 1V to (1V + V
REF
x 2). Note that the DAC’s
output range is still limited by the maximum output volt-
age specification.
Power-Down Mode
The MAX5158/MAX5159 feature a software-program-
mable shutdown mode that reduces the typical supply
current to 2µA. The two DACs can be shutdown inde-
pendently, or simultaneously using the appropriate pro-
gramming command. Enter shutdown mode by writing
the appropriate input-control word (Table 1). In shut-
down mode, the reference inputs and amplifier out-
puts become high impedance, and the serial interface
MAX5158/MAX5159
Low-Power, Dual, 10-Bit, Voltage-Output DACs
with Serial Interface
_______________________________________________________________________________________ 9
Digital GroundDGND9
Serial-Data OutputDOUT10
User-Programmable OutputUPO11
Power-Down Lockout. The device can-
not be powered down when PDL is low.
PDL
12
Reference for DAC BREFB13
Active-Low Clear Input. Resets all reg-
isters to zero. DAC outputs go to 0V.
CL
5
Chip-Select Input
CS
6
Serial-Data Input DIN7
Serial Clock Input SCLK8
Reference for DAC A REFA4
DAC A Offset AdjustmentOSA3
PIN
DAC A Output Voltage OUTA2
Analog Ground AGND1
FUNCTIONNAME
14 OSB DAC B Offset Adjustment
15 OUTB DAC B Output Voltage
16 V
DD
Positive Power Supply
